2-11.Edge Chips
Any edge anomalies (including wafer saw exit marks) in excess of 1.0 mm in either radial depth or width. As viewed under diffuse illumination, edge chips are determined as unintentionally missing material from the edge of the wafer.
5-4-2 Growth of 3C-SiC on Large-Area (Silicon) Substrates Despite the absence of SiC substrates, the potential benefits of SiC hostile-environment electronics nevertheless drove modest research efforts aimed at obtaining SiC in a manufacturable wafer form.Toward this end, the heteroepitaxial growth of single-crystal SiC layers on [...]
3-7. ID Correct and Major Wafer Flat Both should be readily discernible.
2-34.Chemical Mechanical Polishing Chemical Mechanical Polishing/Planarization is short as CMP, a process of smoothing surfaces with the combination of chemical and mechanical forces. It can be thought of as a hybrid of chemical etching and free abrasive polishing.
5-5-3 SiC Contacts and Interconnect All useful semiconductor electronics require conductive signal paths in and out of each device as well as conductive interconnects to carry signals between devices on the same chip and to external circuit elements that reside off-chip. While SiC itself is theoretically capable [...]
3-3. Dimpling A texture resembling the surface of a golf ball. Speci ed in % affected area.
3-11. Particles Particles have the appearance of eyes and if present are usually concentrated at the wafer edges and not within the speci ed area. If present, count once per occurrence.Two particles within 200 microns count as one.
