2-12.Edge Exclusion
The outer annulus of the wafer is designated as wafer handling area and is excluded from surface nish criteria (such as scratches, pits, haze, contamination, craters,dimples, grooves, mounds, orange peel and saw marks). This annulus is 2 mm for 76.2 mm substrates, and 3 mm for 100.0 mm substrates.
2-27.BOW Bow is the deviation of the center point of the median surface of a free, un-clamped wafer from the median surface to the reference plane. Where the reference plane is defined by three corners of equilateral triangle. This definition is based on now obsolete [...]
1-8.Electrical Breakdown The term electrical breakdown or electric breakdown has several similar but distinctly different meanings. For example, the term can apply to the failure of an electric circuit. Alternatively, it may refer to a rapid reduction in the resistance of an electrical insulator that [...]
1-5.Thermal Expansion Coefficient Thermal expansion is the tendency of matter to change in volume in response to a change in temperature. When a substance is heated, its particles begin moving more and thus usually maintain a greater average separation. Materials which contract with increasing temperature are [...]
2-31.N type A semiconductor has electrical conductivity between that of a conductor and an insulator. Semiconductors differ from metals in their characteristic property of decreasing electrical resistivity with increasing temperature.Semiconductors can also display properties of passing current more easily in one direction than the other, [...]
2-6.Wafer Primary Flat The flat of longest length on the wafer, oriented such that the chord is parallel with a specified low index crystal plane; major flat. The primary at is the {10-10} plane with the at face parallel to the <11-20> direction.
3-7. ID Correct and Major Wafer Flat Both should be readily discernible.
