2-12.Edge Exclusion
The outer annulus of the wafer is designated as wafer handling area and is excluded from surface nish criteria (such as scratches, pits, haze, contamination, craters,dimples, grooves, mounds, orange peel and saw marks). This annulus is 2 mm for 76.2 mm substrates, and 3 mm for 100.0 mm substrates.
2-32.Semi-insulating Semi-insulating Doping with the impurities vanadium creates semi-insulating material of silicon carbide.
5-3 Applications and Benefits of SiC Electronics Two of the most beneficial advantages that SiC-based electronics offer are in the areas of high-temperature and high-power device operation. The specific SiC device physics that enables high-temperature and high-power capabilities will be examined first, by several examples of revolutionary [...]
2-4.Wafer Surface Orientation Denotes the orientation of the surface of a wafer with respect to a crystallographic plane within the lattice structure. In wafers cut intentionally “off orientation”, the direction of cut is parallel to the primary at, away from the secondary at. Measured with [...]
3-10. Carrots Similar to comet tails in appearance except they are more angular and lack a discrete head. If present, these features are aligned parallel to the major at. Usually,any carrots present tend to be of the same length. Count once per occurrence. Two [...]
5-4-3 Growth of Hexagonal Polytype SiC Wafers In the late 1970s, Tairov and Tzvetkov established the basic principles of a modified seeded sublimation growth process for growth of 6H-SiC. This process, also referred to as the modified Lely process,was a breakthrough for SiC in that [...]
5-6-4-1 SiC High-Power Rectifiers The high-power diode rectifier is a critical building block of power conversion circuits. Recent reviews of experimental SiC rectifier results are given in References 3, 134, 172, 180, and 181. Most important SiC diode rectifier device design trade-offs roughly parallel well-known [...]
