2-12.Edge Exclusion
The outer annulus of the wafer is designated as wafer handling area and is excluded from surface nish criteria (such as scratches, pits, haze, contamination, craters,dimples, grooves, mounds, orange peel and saw marks). This annulus is 2 mm for 76.2 mm substrates, and 3 mm for 100.0 mm substrates.
3-5. Backside Cleanliness Veri ed by inspecting for a uniform color to the wafer backside. Note there is a darker region near the center of some higher doped wafers. Backside cleanliness speci ed as percent area clean.
2-10.Cracks A fracture or cleavage of the wafer that extends from the frontside surface of the wafer to the back-side surface of the wafer. Cracks must exceed 0.010” in length under high intensity illumination in order to discriminate fracture lines from allowable crystalline striations. Fracture [...]
5-4-4-3 SiC Epilayer Doping In-situ doping during CVD epitaxial growth is primarily accomplished through the introduction of nitrogen (usually) for n-type and aluminum (usually trimethyl- or triethylaluminum) for p-type epilayers . Some alternative dopants such as phosphorus and boron have also been investigated for the [...]
3-7. ID Correct and Major Wafer Flat Both should be readily discernible.
1-8.Electrical Breakdown The term electrical breakdown or electric breakdown has several similar but distinctly different meanings. For example, the term can apply to the failure of an electric circuit. Alternatively, it may refer to a rapid reduction in the resistance of an electrical insulator that [...]
3-2. Scratches Grooves or cuts below the surface plane of the wafer having a length-to-width ratio of greater than 5 to 1. Scratches are speci ed by the number of discrete scratches times the total length in fractional diameter.
