2-37.Test Grade
Test Grade: A silicon carbide wafer of lower quality than Prime, and used primarily for testing processes. SEMI indicates the bulk, surface, and physical properties required to label silicon carbide wafers as “Test Wafers”.
2-37.Test Grade
Test Grade: A silicon carbide wafer of lower quality than Prime, and used primarily for testing processes. SEMI indicates the bulk, surface, and physical properties required to label silicon carbide wafers as “Test Wafers”.
Total Thickness Variation (TTV): The maximum variation in the wafer thickness. Total Thickness Variation is generally determined by measuring the wafer in 5 locations of a cross pattern (not too close to the wafer edge) and calculating the maximum measured difference in thickness. The [...]
2-4.Wafer Surface Orientation Denotes the orientation of the surface of a wafer with respect to a crystallographic plane within the lattice structure. In wafers cut intentionally “off orientation”, the direction of cut is parallel to the primary at, away from the secondary at. Measured with [...]
In optics the refractive index (or index of refraction) n of a substance (optical medium) is a number that describes how light, or any other radiation, propagates through that medium. Refractive index is the basic property of optical crystals, and it is an important parameter [...]
3-2. Scratches Grooves or cuts below the surface plane of the wafer having a length-to-width ratio of greater than 5 to 1. Scratches are speci ed by the number of discrete scratches times the total length in fractional diameter.
5-6 SiC Electronic Devices and Circuits This section briefly summarizes a variety of SiC electronic device designs broken down by major application areas. SiC process and material technology issues limiting the capabilities of various SiC device topologies are highlighted as key issues to be addressed [...]
2-14.Masking Defects also referred to as “Mound” When one defect prevents the detection of another defect, the undetected defect is called the masked defect. A distinct raised area above the wafer frontside surface as viewed with diffuse illumination.