PAM XIAMEN offers 2″CZ Prime Silicon Wafer
tem1, 100pcs
Silicon wafer:
i. Diameter: 50.8 mm ± 0.5 mm,
ii. Thickness: 275 μm ±25μm,
iii. Doping: P type
iv. Orientation: (100) ± 0.5°
v. TTV: ≤ 5 μm
vi. Bow and Warp: ≤ 20 μm
Growth: CZ
Grade: Prime
Resistivity: 1 Ohm-cm to 10 Ohm-cm
Surface: single side polished
Flats: SEMI Standard
Surface roughness: ≤ 5Å
For more information, send us email at sales@powerwaywafer.com and powerwaymaterial@gmail.com
An electrolytic etching technique has been developed which can remove p‐type GaAs substrates from thin (2–10µ) n‐type layers of or . Sodium hydroxide is used as the electrolyte, and is sprayed continually over the etching surface to prevent the build‐up of “flakes” on the p‐type surface [...]
PAM XIAMEN offers 6″ FZ Prime Silicon Wafer. Silicon wafers, per SEMI Prime, P/P 6″ {150.0±0.3mm}Ø×625±15µm, FZ Intrinsic undoped Si:-[100]±0.5°, Ro > 20,000 Ohmcm, Both-sides-polished, One SEMI Flat (57.5mm), Sealed in Empak or equivalent cassette. For more information, please visit our website: https://www.powerwaywafer.com, send [...]
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Two-inch free-standing GaN wafers were implanted by 100 keV H+2 ions with a dose of 1.3 × 1017 cm−2 at room temperature. The hydrogen implantation induced damage in GaN extends between 230 to 500 nm from the surface as measured by cross-sectional transmission electron [...]
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LT-GaAs We offer LT-GaAs for THz or detector and other application. 2″ LT-GaAs Wafer Specification: Item Specifications Diamater(mm) Ф 50.8mm ± 1mm Thickness 1-2um or 2-3um Marco Defect Density ≤ 5 cm-2 Resistivity(300K) >108 Ohm-cm Carrier ＜0.5ps Dislocation Density <1×106cm-2 Useable Surface Area ≥80% Polishing Single side polished Substrate GaAs substrate Other conditions: 1) GaAs substrate should be undoped/semi-insulating with (100)orientation. 2) Growth temperature: ~ 200-250 C Annealed for ~ 10 minutes at [...]
