2-28.WARP
Warp is the difference between the maximum and the minimum distances of the median surface of a free, un-clamped wafer from the reference plane defined above. This definition follows ASTM F657, and ASTM F1390,which deviation from a plane of a slice or wafer centerline [...]
2018-06-28meta-author
5-6-4-1 SiC High-Power Rectifiers
The high-power diode rectifier is a critical building block of power conversion circuits. Recent reviews of experimental SiC rectifier results are given in References 3, 134, 172, 180, and 181. Most important SiC diode rectifier device design trade-offs roughly parallel well-known [...]
2018-06-28meta-author
5-3-1 High-Temperature Device Operation
The wide bandgap energy and low intrinsic carrier concentration of SiC allow SiC to maintain
semiconductor behavior at much higher temperatures than silicon, which in turn permits SiC semiconductor
device functionality at much higher temperatures than silicon . As discussed in basic
semiconductor electronic [...]
2018-06-28meta-author
2-12.Edge Exclusion
The outer annulus of the wafer is designated as wafer handling area and is excluded from surface nish criteria (such as scratches, pits, haze, contamination, craters,dimples, grooves, mounds, orange peel and saw marks). This annulus is 2 mm for 76.2 mm substrates, and [...]
2018-06-28meta-author
3-12. Silicon Droplets
Silicon droplets can appear as either small mounds or depressions in the wafer surface. Normally absent, but if present are largely concentrated at perimeter of wafer. If present, estimate the % of speci ed area affected.
2018-06-28meta-author
5-2-2-2 SiC Semiconductor Electrical Properties
Owing to the differing arrangement of Si and C atoms within the SiC crystal lattice, each SiC polytype
exhibits unique fundamental electrical and optical properties. Some of the more important semiconductor
electrical properties of the 3C, 4H, and 6H SiC polytypes are [...]
2018-06-28meta-author