5-6-4 SiC High-Power Switching Devices

5-6-4 SiC High-Power Switching Devices

5-6-4 SiC High-Power Switching Devices

The inherent material properties and basic physics behind the large theoretical benefits of SiC over silicon for power switching devices were discussed Section 5.3.2. Similarly, it was discussed in Section 5.4.5 that crystallographic defects found in SiC wafers and epilayers are presently a primary factor limiting the commercialization of useful SiC high-power switching devices. This section focuses on the additional developmental aspects of SiC power rectifiers and power switching transistor technologies.

Most SiC power device prototypes employ similar topologies and features as their silicon-based counterparts such as vertical flow of high current through the substrate to maximize device current using minimal wafer area (i.e., maximize current density) . In contrast to silicon, however, the relatively low conductivity of present-day p-type SiC substrates (Section 5.4.3) dictates that all vertical SiC power device structures be implemented using n-type substrates in order to achieve beneficially high vertical current densities. Many of the device design trade-offs roughly parallel well-known silicon power device trade-offs, except for the fact that numbers for current densities, voltages, power densities, and switching speeds are much higher in SiC.

For power devices to successfully function at high voltages, peripheral breakdown owing to edgerelated electric field crowding must be avoided through careful device design and proper choice of insulating/passivating dielectric materials. The peak voltage of many prototype high-voltage SiC devices has often been limited by destructive edge-related breakdown, especially in SiC devices capable of blocking multiple kilovolts. In addition, most testing of many prototype multikilovolt SiC devices has required the device to be immersed in specialized high-dielectric strength fluids or gas atmospheres to minimize damaging electrical arcing and surface flashover at device peripheries. A variety of edge-termination methodologies, many of which were originally pioneered in silicon highvoltage devices, have been applied to prototype SiC power devices with varying degrees of success, including tailored dopant and metal guard rings . The higher voltages and higher local electric fields of SiC power devices will place larger stresses on packaging and on wafer insulating materials, so some of the materials used to insulate/passivate silicon high-voltage devices may not prove sufficient for reliable use in SiC high-voltage devices, especially if those devices are to be operated at high temperatures.

 

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