Q: What wafer size do you provide with flat sapphire substrate?
A:Currently we still can offer 2″ wafer on flat sapphire substrate.
Q: What wafer size do you provide with flat sapphire substrate?
A:Currently we still can offer 2″ wafer on flat sapphire substrate.
Q:We are using 40×40 mil size and 45×45 mil size chips for 1W . And 45×22 or 38x22mil size for 0,5w . Eff. is min. 120lm/w , package form is 3535 ceramic no lens flat type, and 5050 smd flat type.Cct 6500k, cri min 70-75, [...]
Q:Our application will be making micro-pillar arrays based on the MQWs for high brightness LEDs and its wavelength tuning. So we do not really care the emission wavelength you provide but we will mind whether the process and emission wavelength would be consist between [...]
Q:In the test report of blue LED wafers,it shows Vf and IV (mcd). How is this mcd being measured without actually processing the wafer into devices? A:We use prober equipment and contact positive and negative pole, connect current, and then get the voltage and IV.
Q: SiC wafer reclaim, can you gurantee surface roughness<=0.3nm? A: Sure, no problem
PAM-XIAMEN can supply GaAs wafer with EPD less than 5000/cm2. Q: Could you please advise guaranteed EPD for below substrate and epi? Gallium Arsenide wafers, P/E 2″Ø×380±25µm, LEC SI c doped GaAs:-[100]±0.5°, n-type Ro=(0.8E8-0.9E8)Ohmcm, One-side-polished, back-side matte etched, 2 Flats, LT-GaAs EPI: 1-2µm, Resistivity >1E7 Ohm-cm, [...]
Q: I am not sure whether practically LLO can be done on the PSS given it is not a flat surface A: “laser lift-off” actually is according to “NL layer” as below image. If the NL layer is GaN layer, when it is heating to constant high [...]
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