At present, P-P+ (boron doped) silicon epitaxial wafers are widely used in the manufacture of large-scale integrated circuits and discrete devices. The requirements for the thickness of P-P+ silicon epitaxial wafers vary with the device type. For making high-speed digital circuits, only about 0.5μm of epilayer is needed. For high-power devices, it is 10-100μm. The typical thickness of boron doped silicon thin film for CMOS process is 3-10μm. PAM-XIAMEN can grow epitaxial silicon wafers to meet the needs of your applications. Take the boron doped silicon films on boron-doped silicon substrates for example, parameters shown as in the table below. We adopt the back sealing technology to make the resistivity of epitaxial layer be accurately controlled.
1. Specification for Boron Doped Silicon Epitaxial Wafer
PAMP17407 – SI
|1.||Crystal Growing Method||CZ|
|6.||Substrate Radial Resistivity Variation||%||<10|
|8.||Primary Flat Length||mm||32.5±2.5|
|9.||Primary Flat Orientation||(110)±1о|
|11.||Thickness of Substrate in Center Point||μm||525±15|
|14.||Backside Getter Process||Polysilicon|
|15.||Poly Backside Thickness||μm||1.20±0.40|
|16.||Backside Seal Process||LPCVD oxide|
|18.||TTV Max (after Epi Deposition)||μm||7|
|19.||Local Thickness Variation (LTV, SBID), on the site 20×20 mm||μm||<2.0|
|20.||Bow Max (after Epi Deposition)||μm||30|
|21.||Warp Max (after Epi Deposition)||μm||35|
|22.||Epi Layer Conductivity Type||P|
|23.||Epi Layer Dopant||Boron|
|24.||Epi Layer Resistivity||Ω·cm||12.0±1.2|
|25.||Radial Variation of Epi Resistivity||%||<10|
|26.||Thickness of Epi Layer in Center||μm||20±2|
|27.||Radial Variation of the Thickness of Epi Layer||%||<10|
|28.||Epi Transition Zone||μm||<2|
|29.||Epi Flat Zone||μm||>16|
|40.||Back Surface Contamination||None|
|41.||Localized Light Scatters (LLS) with size >0.3μm||pcs/wfr||≤20|
|42.||Shallow Etch Pits||cm-2||<1·102|
|43.||Surface Metals (Na, K, Zn, Al, Fe, Cr, Ni, Cu)||at/cm-2||<1·1011|
2. Boron Doping in Silicon Grown by CZ
Boron (B) is an important electrically active impurity in p-type Czochralski silicon, which is intentionally doped. In particular, heavily boron doped silicon wafer is commonly used as substrate material for p/p+ epitaxial wafer. The introduction of a large number of boron atoms can improve the conductivity of monocrystalline silicon wafer.
Why is B the most important electrically active impurity in p-type monocrystalline silicon? The reasons are:
First of all, when B atom is introduced, holes will be generated in the silicon crystal at the same time, and the number of holes will increase with the increase of B atom concentration.
Secondly, Group IIIA elements B, Al, Ga and In are all acceptor impurities, which can provide holes for Si crystals. However, because the segregation coefficients of Al, Ga and In are too small, it is difficult to control the crystal resistivity when doping if they are used as dopants. The segregation coefficient of boron doping in Si is about 0.8, which is close to 1, so that the boron doped silicon resistivity has good consistency in head and tail, and the utilization of the whole single crystal is improved.
Thirdly, the melting point and boiling point of boron are higher than that of silicon. B hardly volatilizes during the growth of silicon crystal, which ensures the matching of target doping concentration and actual concentration during crystal growth.
Fourthly, B has a large solid solubility (2.2X 1030/cm3) in silicon single crystal at room temperature. Therefore, the resistivity controllable range of p-type Si wafer is relatively large by adjusting the B concentration, and the minimum resistivity can reach 0.1m Ω·cm -1.
Fifthly, the diffusion of B in Si belongs to the diffusion of substitutional atoms, which is difficult to achieve through the generation and movement of crystal thermal defects. This ensures the stability of the number and position of B in silicon, that is, the stability of p-type semiconducting materials doped by B.