The ability to grow thin GaN layers on Si substrates has led to the development of lateral high power and high-speed devices such as GaN HEMTs. These devices have already demonstrated promising performance and have been adopted for mass market. But lateral devices require large drain/gate separation to sustain [...]
Heteroepitaxial growth of 3C‐SiC on Si by chemical vapor deposition has been investigated using the precursor trimethylsilane. To optimize the growth process and to obtain high growth rates, we have investigated the effect of temperature and precursor flow rate on on‐axis Si(100) and off‐axis Si(111) substrates. High growth rates, [...]
Top 10 Publication in in Microelectronics & Electronic Packaging by Citation Post: PAM-XIAMEN, date: Jan 13,2020 PAM-XIAMEN has compiled top 10 the ranking data and the publication name in Microelectronics & Electronic Packaging by citation in impact factor(h5-index and h5 median, according to google scholar) PAM-XIAMEN is a leading manufacturer of semiconductor [...]
Effects of trace levels of Ge transferred to Si surfaces during thermal processing of SiGe wafers are presented here. Si wafers were coprocessed in an oxidation furnace with SiGe relaxed graded buffer layers grown on Si. Total X-ray fluorescence measurements on Si wafers showed Ge concentrations in varying degrees [...]
The Silicon on Lattice Engineered Substrate (SOLES) platform enables monolithic integration of III-V compound semiconductor (III-V) and silicon (Si) complementary metal oxide semiconductor (CMOS) devices. The SOLES wafer provides a device quality Si-on-Insulator (SOI) layer for CMOS device fabrication and an embedded III-V device template layer which serves as [...]
Thermodynamic analysis was conducted to determine the conditions necessary for the selective epitaxial growth (SEG) of SiC on masked Si substrates, and these results were compared to blanket SiC epitaxy on plain Si. For blanket SiC epitaxy, the proper deposition conditions leading to single‐phase SiC without Si or graphite codeposition [...]
Two-dimensional (2D) arrays of nanometre scale holes were opened in thin SiO2 layers on silicon by electron beam lithography and chemical etching. Oxidized silicon wafers with a 5 nm thick SiO2 layer on top were used in this respect. Pattern transfer involved either only removal of SiO2 or a two-step process of oxide [...]
2018 TOP 100 US HIGHER EDUCATION R&D EXPENDITURES post by PAM-XIAMEN date: Jan 03,2020 University is an important research and development subject in the innovation system. In all 912 US universities, PAM-XIAMEN has compiled the ranking data and the name by source of funds to list top 100 US higher education R&D [...]
In this paper, a sandwich structure comprising a SiO2 capping layer, amorphous Germanium (a-Ge) nanodots (NDs), and a pit-patterned Silicon (Si) substrate is developed, which is then annealed by utilizing a pulsed ultraviolet excimer laser in order to fabricate an array of pure, single crystal Ge NDs at room temperature. [...]
Fully spectroscopic x/γ-ray imaging is now possible thanks to advances in the growth of wide-bandgap semiconductors. One of the most promising materials is cadmium zinc telluride (CdZnTe or CZT), which has been demonstrated in homeland security, medical imaging, astrophysics and industrial analysis applications. These applications have demanding energy and [...]
