Study on the Regulatory Effect of Buffer Layers on Defect Behavior in 4H-SiC Homoepitaxy +
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In recent years, with breakthroughs in the growth technology of large-diameter, high-quality SiC ingots, the substrate size of 4H-SiC has transitioned from 150mm to 200mm, which helps reduce device manufacturing costs and increase production capacity. However, crystal defects in the epitaxial layer—including basal plane dislocations (BPDs), stacking faults (SFs), triangular defects, carrot defects, and surface pits—can significantly degrade the electrical performance of power devices, increasing leakage current, altering current–voltage characteristics, and reducing device reliability.
As a key interfacial structure connecting the substrate and the epitaxial layer, the buffer layer aims to suppress the propagation of substrate defects (such as dislocations, particles, or contaminants) into the epitaxial layer, thereby improving the crystal quality of the drift layer. This paper reviews the effects of buffer layer thickness optimization, doping transition design, growth rate modulation, and growth interruption strategies on defect behavior in 4H-SiC homoepitaxy.
1. Effect of Buffer Layer Thickness on Defect Density in SiC Epitaxial Layers
1.1 Correlation Between Increased Thickness and Morphological Defects
In CVD epitaxial processes, the choice of buffer layer thickness directly affects the crystal quality of the subsequent drift layer. Raciti et al. systematically investigated the effect of increasing buffer layer thickness on defect behavior on 200mm 4H-SiC substrates. Using n-type doped substrates from two different suppliers (denoted A and B), they compared the defect distribution of samples with a standard-thickness buffer layer (thin buffer) and a double-deposition-time buffer layer (thick buffer).
The results showed that in all comparative experiments, the wafer defect rate was higher for thick-buffer samples than for thin-buffer samples. Specifically, morphological defect maps obtained by bright-field optical microscopy (KLA Altair) revealed a significantly higher percentage of defective chips for thick-buffer samples from both supplier A and supplier B.
Fig. 1 (a) Morphological defect maps of two sample groups from supplier A (thin buffer vs. thick buffer) (chip size: 5×5mm²); (b) Estimated defective chip percentages for sample pairs from suppliers A and B (thin buffer vs. thick buffer)
1.2 Defect Classification Statistics by Scattered Light Method
To further quantify changes in defect types, Raciti et al. performed high-resolution characterization using the KLA Candela scattered light inspection system. This tool combines scattered light channels at different laser incidence angles and a photoluminescence channel to distinguish morphological defects from crystalline defects.
Average defect counts for five wafer pairs from supplier A showed that thick-buffer samples generally exhibited higher numbers of surface morphological defects (including fall-on particles, pits, scratches, etc.) than thin-buffer samples, except that the average count of surface triangular defects was comparable between the two thicknesses. For crystalline defects, the observed trend was variable.
Fig. 2 Candela inspection examples of two thin-buffer vs. thick-buffer wafer pairs: (a) supplier A sample pair; (b) supplier B sample pair
Fig. 3 Average defect counts for thin-buffer (orange) vs. thick-buffer (blue) samples from five wafer pairs of supplier A, sorted by defect type
This trend was more pronounced for supplier A, benefiting from its better crystal quality (i.e., lower defect variability). This finding suggests that while increasing buffer layer thickness can help suppress substrate defects to some extent, excessive thickness may introduce additional surface morphological defects.
2. Substrate–Buffer Doping Transition and Growth Rate Optimization
2.1 Effect of Graded Doping Transition on Stress Release
Rana et al. pointed out that commercial substrates have a doping concentration of approximately 1×10¹⁹cm⁻³, while typical buffer layers have a doping concentration of about 1×10¹⁸cm⁻³, resulting in a doping difference of approximately 9×10¹⁸cm⁻³. If the doping transition is too abrupt, such a large change in doping concentration generates high misfit stress at the interface, which can induce crystal defects.
To alleviate this misfit stress, Rana et al. proposed a graded doping transition strategy. In their experiments, Experiment 1 employed an abrupt introduction of nitrogen flow (steep transition), targeting a buffer doping of 1×10¹⁸cm⁻³. Experiment 2 started with a higher initial nitrogen flow (target doping ~7×10¹⁸cm⁻³) and gradually decreased to 1×10¹⁸cm⁻³ over one minute. Experiment 3 extended the grading time to four minutes.
The results showed that the sample with an abrupt doping transition (Experiment 1) exhibited the highest basal plane dislocation density. When the doping was gradually transitioned over one minute (Experiment 2), the BPD density decreased significantly. Extending the grading time to four minutes (Experiment 3) led to a further reduction in BPD density. As shown in Fig. 4, the stacking fault density followed the same trend. This reduction in defect density is attributed to the effective release of misfit stress by the graded transition.
Fig. 4 (a) Basal plane dislocation density and (b) stacking fault density under different buffer layer doping grading conditions
Furthermore, Kelvin probe force microscopy characterization confirmed that the surface leakage current of samples with graded doping buffer layers was significantly lower than that of samples with abrupt transitions. The authors believe that the reduction in delta potential arises from the improved crystal quality achieved under graded doping conditions.
Fig. 5 (a) Contour maps of surface leakage current in epitaxial layers under different buffer doping grading conditions; (b) Delta potential diagrams showing improved leakage behavior under graded buffer conditions
2.2 Effect of Buffer Layer Growth Rate on BPD Conversion
Rana et al. also investigated the effect of buffer layer growth rate on epitaxial layer defects. They found that a higher growth rate favors a reduction in basal plane dislocation density. The mechanism is as follows: when Si and C adatoms arrive at the surface at a higher rate, replication of BPDs along the basal plane becomes energetically unfavorable, so the defects tend to convert into threading edge dislocations (TEDs) along the direction perpendicular to the basal plane. However, a higher growth rate also increases the density of surface pits.
Fig. 6 (a) Basal plane dislocation density at different buffer layer growth rates; (b) Pit density at different buffer layer growth rates
3. Growth Interruption Strategy and Hydrogen Etching Effect
Kumar et al. proposed a novel buffer layer growth interruption method, in which a hydrogen etching step is introduced during buffer layer deposition, achieving a significant reduction in epitaxial layer defect density. The study used 150mm 4H-SiC (0001) Si-face substrates and compared samples with conventional continuous growth versus interrupted growth.
The interruption temperature was set slightly below the epitaxial growth temperature to minimize side effects of hydrogen etching. Experiments showed that the whole-wafer thickness uniformity was better than 1.8%, confirming that the interruption process did not adversely affect thickness uniformity.
Fig. 7 (a) Temperature profile of the 4H-SiC epitaxial process for growth interruption experiments; (b) Epitaxial layer thickness measurement results (inset shows measurement point map), with a 5mm edge exclusion
Defect scanning by KLA Candela 8520 showed that the total killer defect density of the sample with the growth interruption process was reduced by approximately 45(±5)% compared to the conventional continuous growth sample. This improvement is mainly attributed to the conversion of BPDs to TEDs during the growth interruption step.
Fig. 8 (a) Candela 8520 defect scan of growth without interruption; (b) Defect scan of growth with interruption; (c) Defect density comparison with and without interruption; (d) High-resolution images of typical SiC defects from Candela inspection (1.5×1.5mm²); (e) AFM images of the substrate center at growth temperature (G°C) and interruption temperature (I°C); (f) KMC simulation results of stacking fault extension length as a function of epitaxial layer thickness with and without hydrogen atoms present
AFM characterization showed that the substrate surface roughness measured at the interruption temperature (Rq≤0.2nm) was significantly lower than that after hydrogen etching at the epitaxial growth temperature (Rq≥0.8nm). KMC simulations further revealed that hydrogen atoms diffuse from the near-surface region into the epitaxial layer and occupy defect sites, effectively preventing the extension of stacking faults. Based on a chip size of 2×2mm², the epitaxial yield of the growth interruption process exceeded 96.5%.
In summary, the thickness, doping transition method, growth rate, and growth interruption strategy of the buffer layer all significantly regulate the defect density in 4H-SiC homoepitaxy. Future research needs to further expand the statistical sample size, elucidate the synergistic mechanisms among multiple parameters, and evaluate the impact of optimized buffer layer processes on the electrical performance of final power devices.
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References:
- Raciti, D., Anzalone, R., Isacson, M., Piluso, N., & Severino, A. (2024, August). Buffer Layer Dependence of Defectivity in 200mm 4H-SiC Homoepitaxy. In Defect and Diffusion Forum (Vol. 434, pp. 117-121). Trans Tech Publications Ltd.
- Rana, T., Wu, J., Chung, G., Moeggenborg, K., & Gave, M. (2023, June). Study of Defects in 4H-SiC Epitaxy at Various Buffer Layer Growth Conditions. In Defect and Diffusion Forum (Vol. 425, pp. 63-68). Trans Tech Publications Ltd.
- Kumar, S., Bera, L. K., Nguyen, X. S., Song, W. D., Lee, A. M. A., Li, X. Y., … & Yeo, Y. C. (2025). Defect Density Reduction in 4H-SiC (0001) Epilayer via Growth-Interruption during Buffer Layer Growth. Solid State Phenomena, 376, 27-31.