Evaluation method of threshold voltage shift of SiC MOSFETs under negative gate bias using n-type SiC MOS capacitors

A novel method for estimating threshold voltage shifts of n-channel SiC MOSFETs under negative gate bias stresses has been proposed. In the proposed method, n-type SiC MOS capacitors were utilized instead of n-channel SiC MOSFETs. The n-type SiC MOS capacitors were exposed to ultraviolet light to generate holes around the gate region at the SiC surfaces. By applying negative gate voltage under this condition, inversion layers of the holes were formed, and negative gate bias stress was applied to the gate oxides of the n-type SiC MOS capacitors. By this method, we investigated the tendency of flat band voltage shifts in SiC MOS capacitors depending on the gate oxide forming condition, and it was confirmed that the tendency is in accord with that of threshold voltage shifts in SiC MOSFETs obtained by the conventional method.


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