Growth of InGaN layers on (1 1 1) silicon substrates by reactive sputtering
InGaN films were grown on (1 1 1) silicon substrates by reactive magnetron sputtering. It was demonstrated that the indium composition in the InGaN films can be controlled by varying the ratio of the applied radio-frequency [...]
2014-02-08meta-author
InGaN
This study simulates thermal conductivity via a carrier scattering mechanism and the related parameters are obtained based on first principles for intrinsic and doped silicon carbide (SiC) over a temperature range of 300–1450 K. The theoretical analysis results show that the thermal conductivity decreases with [...]
2020-02-11meta-author
PAM XIAMEN offers 6″ Monocrystalline Silicon Wafer with Thermal Oxide 20nm
6inch diameter wafer made of monocrystalline silicon with isolation oxide
Diameter 152.4mm
Polishing: one-sided for microelectronics
Type of conductivity and alloying: not specified
Surface orientation: not specified
Primary and secondary flat orientation: not specified
Thickness: 675 microns±20 microns
Wedge (TTV): less than 15 microns
Distortion: less than 35 microns
Thickness of the isolation oxide: at least 20 nm
Front side: polished
Back side: lapped-etched
For more information, send us email at sales@powerwaywafer.com and powerwaymaterial@gmail.com
2021-03-17meta-author
PAM XIAMEN offers test grade silicon wafers
Below is just a short list of the test grade silicon substrates that we have in stock!
Inches
Cust class
Dopant
Type
Orientation
PFL length
PFL direction
SFL
Off orientation
Resistivity
Diameter
Thickness
Bow
TTV
Warp
6
DSP
Antimony
N+
100
57,5 ± 2,5
110 ± 0,50
0.0 ± 0.5°
0.01 – 0.02 Ohmcm
150 ± 0.2 mm
300 ± 10 µm
30
10
30
6
DSP
Arsenic
N+
100
57,5 ± 2,5
110 ± 1
0.0 [...]
2019-02-25meta-author
PAM XIAMEN offers 2″ Silicon Wafer.
Material
Orient.
Diam.
Thck
(μm)
Surf.
Resistivity
Ωcm
Comment
n-type Si:P
[100]
2″
280
P/P
1-5
SEMI Prime,
Si:P
[100-6°]
2″
300
P/E
1-5
SEMI Prime,
n-type Si:P
[100]
2″
350
P/P
1-50
Test, Polished but dirty and scratched. Can be re-polished for additional fee, NO Flats
n-type Si:P
[100] ±1°
2″
400 ±15
P/P
1-10
SEMI Prime, TTV<3μm, Empak cst
n-type Si:P
[100]
2″
3175
P/E
1-3
Prime, NO Flats, Individual cst
n-type Si:P
[100] ±1.0°
2″
6000
P/E
1-10
SEMI Prime, , Individual cst
n-type Si:P
[100]
2″
300
P/P
0.8-1.0
SEMI Prime,
n-type Si:Sb
[100]
2″
300
P/E
0.01-0.02
SEMI Prime,
n-type Si:Sb
[100]
2″
500
P/P
0.01-0.02
SEMI Prime, , in [...]
2019-03-07meta-author
Suppression Of Gate Leakage Current In GaN MOS Devices By Passivation With Photo-grown Ga2O3
We report the use of photo-enhanced chemical (PEC) technique to form high-quality metal oxide semiconductor (MOS) devices made of gallium oxide (Ga2O3)/gallium nitride (GaN). Gate leakage current density as low as [...]
2012-12-07meta-author