Indium arsenide (InAs) single crystal is available with S doped, Zn doped, Sn doped and undoped conductivity types in various orientations and sizes. InAs is a compound semiconductor material that is difficult to purify. Indium arsenide single crystal growth can be processed by LEC [...]
2019-03-12meta-author
Phonon Properties of SiC Wafer
Nanyang Technological University use our SiC wafer to research Phonon Properties. They research focused on the phonon properties of crystal. Different crystal structures have slight different phonon
For more details, please refer to below publications:
https://www.nature.com/articles/s41467-018-04168-x
https://www.nature.com/articles/s41467-020-15767-y
Resonant nanostructures for highly confined and ultra-sensitive [...]
2020-09-21meta-author
PAM-XIAMEN offers (20-21) Plane Si-GaN Freestanding GaN Substrate
Item
PAM-FS-GAN(20-21)-SI
Dimension
5 x 10 mm2 or 5 x 20 mm2
Thickness
380+/-50um
Orientation
(20-21)/(20-2-1) plane off angle toward A-axis 0 ±0.5°
(20-21)/(20-2-1) plane off angle toward C-axis -1 ±0.2°
Conduction Type
Semi-Insulating
Resistivity (300K)
> 106 Ω.cm
TTV
≤ 10 µm
BOW
BOW ≤ 10 µm
Surface Roughness:
Front side: Ra<0.2nm, epi-ready;
Back side: Fine Ground or polished.
Dislocation Density
≤5 x 106 cm-2
Macro Defect Density
0 cm-2
Useable Area
> 90% (edge exclusion)
Package
each in single wafer container, under nitrogen atmosphere, packed in class 100 clean room
For more information, please contact us email at victorchan@powerwaywafer.com and powerwaymaterial@gmail.com
2020-08-20meta-author
Simulations are carried out to explore the possibility of achieving high breakdown voltage of GaN HEMT (high-electron mobility transistor). GaN cap layers with gradual increase in the doping concentration from 2 × 1016 to 5 × 1019 cm−3 of N-type and P-type cap are investigated, respectively. Simulation results show that HEMT [...]
2019-11-07meta-author
Highlights
•Effects of atomic step width on the removal of sapphire and SiC wafers are studied.
•The reason of effects of step width on the removal and the model are discussed.
•CMP removal model of hexagonal wafer to obtain atomically smooth surface is proposed.
•The variations of atomic [...]
2015-10-28meta-author
PAM XIAMEN offers 4″ Silicon Wafer.
Material
Orient.
Diam.
Thck
(μm)
Surf.
Resistivity
Ωcm
Comment
n-type Si:P
[112-5° towards[11-1]] ±0.5°
4″
765
P/P
FZ ~100
SEMI Prime, TTV<3μm
n-type Si:P
[112-5° towards[11-1]] ±0.5°
4″
795
E/E
FZ >100
SEMI, in Empak, TTV<4μm, Lifetime>2,000μs
Intrinsic Si:-
[110]
4″
500
P/P
FZ >20,000
SEMI Test (Both sides with defects) @ [111] – Secondary 70.5° CCW from Primary
Intrinsic Si:-
[110] ±0.5°
4″
500
P/E
FZ >15,000
Prime
Intrinsic Si:-
[100]
4″
500
P/P
FZ >30,000
SEMI Prime, TTV<1μm
Intrinsic Si:-
[100]
4″
500
P/P
FZ >30,000
SEMI Prime, TTV<2μm, Groups of 5 wafers
Intrinsic Si:-
[100]
4″
500
P/P
FZ >30,000
SEMI Prime, TTV<5μm
Intrinsic Si:-
[100]
4″
350
P/P
FZ >20,000
Prime, TTV<5μm
Intrinsic Si:-
[100]
4″
350
P/P
FZ >20,000
Prime, [...]
2019-03-05meta-author