III-V Heterojunction Tunnel FET Structure *S

Tunneling Field Effect Transistor (tunnel FET, TFET) is a novel semiconductor device that operates based on the quantum mechanical tunneling effect. Compared with traditional MOSFETs (metal oxide semiconductor field-effect transistors), the main advantage of TFETs is that they can theoretically achieve lower subthreshold swings, which means they can still maintain good switching performance at extremely low voltages, thereby helping to reduce the power consumption of integrated circuits. PAM-XIAMEN is able to epitaxially grow tunnel FET structure based on III-V compound materials, please refer to the following structure for details:

1. III-V Material Based Tunnel FET Structure

Epi Layer	Thickness	Doping	Composition
n+ InGaAs	–	–
i InGaAs	150nm
p++ GaAsSb	–	–
p+ GaAsSb	–	–
AlInAs	–
Al1-xInxAs buffer			X:0.52~0.64
InP Sub

 

2. Tunnel Field-Effect Transistor Working Principle

Tunnel field-effect transistor is a device that utilizes the phenomenon of band to band tunneling (BTBT) between the conduction and valence bands of charge carriers in the channel region controlled by the gate electrode to achieve FET performance. The schematic diagram of the basic TFET structure is shown in Fig. 1. It can be seen from the figure that the doping type of the drain and channel regions of the device is the same, which is an important feature that distinguishes it from traditional MOSFETs.

Fig. 1 Basic structure of TFET

Traditional MOSFETs use an external gate voltage to control the channel on the surface of the channel region to achieve the transition between the on and off states between the drain and source, while TFETs use the gate voltage to control the inter band tunneling process of carriers in the channel region to achieve the on and off of the device. For tunnel FET working principle, taking n-TFET as an example, when there is no external gate voltage, due to the heavily doped p-type source region and lightly doped n-type channel region, the depletion region between the source and channel makes it difficult for electrons in the source region to tunnel into the channel region. Therefore, the device is in an off state, and its off state current is smaller than that of traditional MOS devices; As the applied gate voltage gradually increases, the energy band of the channel region continuously pulls down; When the conduction band of the channel region is pulled down below the valence band of the source region, the energy bands of the source region and the channel region begin to align or even overlap, causing a large number of electrons located in the valence band of the source region to tunnel into the conduction band of the channel region, thus causing the device to instantly transition from the off state to the on state.

Fig. 2 Surface band diagram of TFET in off state

Fig. 3 Band diagram of TFET surface in on state

Due to the much faster conversion process compared to traditional MOSFETs, Tunnel FET devices can have good subthreshold characteristics, and their subthreshold slope may be lower than the ideal value of traditional MOS devices.

3. Tunnel Field-Effect Transistors Challenges and Developments

Currently, TFET faces with following challenges:

1) Low on state current: Compared with traditional MOSFETs, tunnel FET has a lower on state current, which limits its application in high-speed and high-performance electronic devices.    

2) Complex manufacturing process: Achieving effective quantum tunneling effect requires precise control of the band structure and doping concentration of semiconductor materials, which places higher demands on existing semiconductor manufacturing technologies.    

3) Relationship between device size and performance: As device size continues to shrink, the impact of barrier region width on tunnel current becomes more significant. How to maintain good tunneling efficiency at the nanoscale is a challenge.    

4) Reliability issue: Due to the sensitivity of quantum effects to environmental conditions such as temperature and voltage fluctuations, the long-term stability and reliability of TFETs need further research and improvement.

Therefore, development guidelines for tunnel transistor are put forward as:

1) Exploration of new materials: Develop new two-dimensional materials (such as graphene, transition metal sulfides, etc.) and wide bandgap semiconductors (such as gallium nitride, gallium oxide, etc.) to optimize band structure and improve tunneling efficiency.    

2) Device structure innovation: By designing new TFET structures, such as multi-channel TFET, superlattice TFET, etc., the charge transfer characteristics are improved, and the on state current and switching ratio are increased.   

3) Integration and packaging technology: Combining advanced micro nano processing technology and 3D integrated circuit packaging technology to solve various challenges brought by miniaturization and achieve large-scale integration.    

4) Theoretical modeling and simulation: Establish more accurate physical models and simulation tools to guide the design and optimization of vertical tunnel FET, predict and solve potential problems in practical applications.

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