SiC接合ウェーハ

Wafer bonding refers to the tight bonding of two mirror polished homogeneous or heterogeneous wafers through chemical and physical processes. After the wafers are bonded, the atoms at the interface react under external forces to form covalent bonds and bond together, achieving a specific bonding strength at the bonding interface. Advanced SiC bonded wafer technology can bond and integrate high and low-quality SiC substrates, effectively utilizing low-quality long crystal substrates and promoting the reduction of SiC material costs together with long crystal technology. SiC bonded wafer is available, and rough parameters is listed as in the table below. For product details, please consult our sales team at [email protected].

1. Specification of Bonded SiC Substrate

2. Bonding Conditions for SiC接合ウェーハ

The intrinsic factors that affect bonding quality are the chemical adsorption state, flatness, and roughness of the wafer surface. The external factors mainly include the temperature and time of bonding. Usually, pressure is also required to overcome surface undulations and increase the bonding density between surface atoms, in order to achieve the goal of improving bonding strength. The basic conditions for determining the success or failure of SiC bonding are:

1) Geometric conditions: The use of wafer bonding techniques can effectively solve the problem of lattice mismatch, and it is necessary to ensure that the surface flatness and elastic modulus difference of the two bonded wafers are small;

2) Mechanical conditions: The surface required for bonding SiC needs to be very smooth, with a small surface roughness, less than 2nm, achieved through chemical mechanical polishing (CMP);

3) Physical conditions: Due to the presence of defects such as large grain boundaries, lattice dislocations, and double spikes during the process of epitaxial or grain growth, these also need to be removed by CMP;

4) Chemical conditions: The cleanliness of the two bonding surfaces is crucial, and impurities such as surface metals and organic compounds should be removed during wafer bonding process;

5) Energy conditions: During the heat treatment process, temperature may cause chemical reactions of residual substances on the surface, and the introduction of thermal stress during the bonding process can lead to deformation and other adverse effects on the device.

In order to achieve good bonding quality, it is usually necessary to prepare the wafers to be bonded in advance, mainly through three processes: surface treatment, pre-bonding, and heat treatment.

3. Research on Bonded SiC-SiC Wafers via Surface Activation Bonding(SAB)

Recent research shows that by using SAB technology and ion implantation exfoliation technology, high-quality SiC thin layer bonding is transferred to low-quality single crystal SiC substrates, achieving effective use of low-quality single crystal SiC substrates. Each high-quality SiC wafer can be reused more than 30 times (i.e., each high-quality wafer can produce more than 30 thin layers), with an expected cost reduction of 40%. The SiC bonded wafer exhibits a defect density comparable to high-quality substrates, with an interface thermal resistance as low as 2.8+1.4/-0.7 m ² K/GW, and a low electric field strength at the bonding interface. This interface thermal resistance is currently the lowest value reported internationally for the bonding interface between SiC and other materials such as SiC, GaN, and Ga2O3.

The 6-inch SiC epitaxial layer grown on the bonded substrate achieved a defect free yield of up to 99.2%. The 1200V, 20m Ω SiC MOSFET device manufactured based on this 6-inch epitaxial layer demonstrated a yield of over 70% (tested under IDSS<2 µ A at 1200V conditions), and its performance and reliability are comparable to state-of-the-art commercial devices. The circuit robustness test showed that there was no degradation of the bonding interface under surge currents exceeding 250A and lasting for 10ms. This achievement is the first report on wafer level device data and high current robustness based on SiC bonded wafer. The results indicate that this bonded technology has enormous potential and provides an important development direction for more economical and sustainable SiC power electronic devices.

Whether you need boned wafer of SiC for research or for industrial applications, please contact us email at [email protected] と [email protected].