SiC를 에피 택시

우리는 사용자 박막 (실리콘 카바이드), 실리콘 카바이드 장치의 개발 6H 또는 4H SiC를 기판 상에 에피 택시를 제공한다. SiC를 에피 웨이퍼는 주로 쇼트 키 다이오드, 금속 산화물 반도체 전계 효과 트랜지스터, 접합 전계 효과에 사용
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SiC를 에피 택시

PAM-XIAMEN provide custom thin film (silicon carbide) SiC epitaxy on 6H or 4H substrates for the development of silicon carbide devices. SiC epi wafer is mainly used for the fabrication of 600V~3300V power devices, including SBD, JBS, PIN, MOSFET, JFET, BJT, GTO, IGBT, etc. With a silicon carbide wafer as a substrate, a chemical vapor deposition (CVD) method is usually used to deposit a layer of single crystal on the wafer to form an epitaxial wafer. Among them, SiC epitaxy are prepared by growing silicon carbide epitaxial layers on conductive silicon carbide substrates, which can be further fabricated into power devices.

1.Specification of SiC epitaxy:

항목 명세서 일반적인 값
폴리 형 4H
대한 오프 오리엔테이션 4 ℃에서 오프
<11 2_ 0>
전도도 n 형
도펀트 질소
캐리어 농도 5E15-2E18 cm-3
허용 오차 ± 25 % ± 15 %
일률 2 '(이 50.8mm) <10 % 7 %
3 "(76.2mm) <20 % 10 %
4 "(100mm) <20 % 15 %
두께 범위 5 ~ 15 μm의
허용 오차 ± 10 % ± 5 %
일률 2 "<5 % 2 %
3 '<7 % 3 %
4 "<10 % 5 %
대형 포인트 결함 2 "<30 2 "<15
3 "<60 3 "<30
4 "<90 4 "<45
에피 결함 ≤20 cm-2 ≤10 cm-2
단계 뭉침 ≤2.0nm (Rq가) ≤1.0nm (Rq가)


2 mm edge exclusion for 50.8 and 76.2 mm, 3 mm edge exclusion for 100.0 mmNotes:

• Average of all measurement points for thickness and carrier concentration (see pg. 5)
• N-type epi layers <20 microns are preceeded by n-type, 1E18, 0.5 micron buffer layer
• Not all doping densities are available in all thicknesses
• Uniformity:standard deviation(σ)/average
• Any special requirement on the epi-parameter is on request

2. Introduction of SiC Epitaxy

Why do We Need Silicon Carbide Epitaxial Wafer? Because different from the traditional silicon power device manufacturing process, silicon carbide power devices cannot be directly fabricated on silicon carbide single crystal materials. High-quality epitaxial materials must be grown on conductive single crystal substrates, and various devices manufactured on the SiC epitaxial wafer.

The main epitaxial technology for SiC epitaxy growth is chemical vapor deposition (CVD), which realizes a certain thickness and doped silicon carbide epitaxial material through the growth of SiC epitaxy reactor step flow. With the improvement of silicon carbide power device manufacturing requirements and withstand voltage levels, SiC epi wafer continues to develop in the direction of low defects and thick epitaxy.

In recent years, the quality of thin silicon carbide epitaxial materials (<20 μm) has been continuously improved. The microtubule defects in the epitaxial materials have been eliminated. However, the SiC epitaxy defects, such as drop, triangle, carrot, screw dislocation, basal plane dislocation, deep-level defects, etc., become the main factor affecting device performance. With the advancement of SiC epitaxy process, the thickness of the epitaxial layer has developed from a few μm and tens of μm in the past to the current tens of μm and hundreds of μm. Thanks to the advantages of SiC over Si, the SiC epitaxy market is growing rapidly.

Since silicon carbide devices must be fabricated on epitaxial materials, basically all silicon carbide single crystal materials will be used as SiC epitaxial film to grow epitaxial materials. The technology of silicon carbide epitaxial materials has developed rapidly internationally, with the highest epitaxial thickness reaching more than 250 μm. Among them, the epitaxy technology of 20 μm and below has a high maturity. The surface defect density has been reduced to less than 1/cm2, and the dislocation density has been reduced from 105/cm2 to 103/cm2. The dislocation conversion rate of base plane is close to 100%, which has basically met the requirements of epitaxial materials for large-scale production of silicon carbide devices.

In recent years, the international 30 μm~50 μm epitaxial material technology has also matured rapidly, but due to the limitation of SiC epi market demand, the progress of industrialization has been slow. At present, industrialization company can offer silicon carbide epitaxial materials in batches, include Cree SiC epitaxy, PAM-XIAMEN SiC epitaxy, Dow Corning SiC epitaxy etc..

3.Test Methods

1 위. 캐리어 농도 : 순 도핑 수은 프로브를 이용하여 CV Afer 즉 전체 평균 값으로 결정된다.
2 번. 두께 : 두께 FTIR을 사용하여 웨이퍼를 가로 지르는 평균 값으로 결정된다.
No.3.Large 점 결함 : 현미경 검사는 올림푸스 광학 현미경, 또는 비교에, 100X에서 수행.
No.4. Epi Defects Inspection or defect map performed under KLA-Tencor Candela CS20 Optical Surface Analyzer or SICA.
5 번. 단계 뭉침 스텝 뭉침 거칠기가 10 ㎛의 x10μm 영역을 AFM (원 자간 력 현미경)으로되어 scaned

3-1:Large Point Defects Descriptions

비 보조 눈에 명확한 형태를 전시하고>에서 50microns 있습니다 결함. 이러한 기능은 스파이크, 부착 입자, 칩 andcraters을 포함한다. 큰 점결함 미만 3mm 떨어져 하나의 결함으로 간주.

3-2:Epitaxy Defect Descriptions

SiC epitaxy defects include 3C inclusions, comet tails, carrots, particles, silicon droplets and downfall.


4. Application of SiC epitaxial wafer

역률 보정 (PFC)
PV 인버터 및 UPS (무정전 전원 장치), 인버터
모터 드라이브
출력 정류
하이브리드 또는 전기 자동차
600V, 650V, 1200V, 1700V와 SiC 쇼트 키 다이오드는, 3300V 사용할 수 있습니다.

Please see below detail application by field:

Field Radio Frequency(RF) Power Device LED 
자료 SiLDMOS Si GaN/Al2O3
갈륨 비소 GaN/Si GaN/Si
GaN/Si Ga203 /
Device SiC based GaN HEMT SiC based MOSFET  
SiC based BJT
SiC based IGBT
SiC based SBD
Application Radar, 5G Electric vehicles Solid State Lighting


5. Mechanical wafers with Epi layes: are available, such as for process monitoring, which require wafers with low bow and warpage.

150mm 4H n-type SiC EPI wafers

Intrinsic SiC Epilayer on Silicon carbide substrate

Why do We Need Silicon Carbide Epitaxial Wafer?

4 Inch SiC Epi Wafer

4H SiC Epitaxial Wafers

SiC IGBT Wafer

SiC MOSFET Structure Homoepitaxial on SiC substrate

검출기용 탄화규소(SiC) 에피택셜 박막

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