Silicon wafers with various metal depositions are for sale in sizes from 2 inch to 12 inch. Metal deposition on silicon wafer is usually processing on the substrate surface, and thickness of the substrate typically is 300um~700um. A wafer list is shown below for your reference:
1. Wafer List of Metal Deposition on Silicon Wafer
| No. | Material | Size(inch) | Surface Finished | Type | Thickness (um) | Film Thickness(nm) | Resis.(ohm.cm) | Reference Edge |
| M2 | Gold Coated Silicon Wafer | 4 | SSP | N100 | 450±15 | 10nmCr+100nmAu | 0.01~0.02 | 2 |
| M4 | Gold Coated Silicon Wafer | 2 | SSP | P100 | 430±10 | 20nmTi+100nmAu | 0~0.005 | – |
| M5 | Gold Plated Silicon Wafer | 2 | SSP | N100 | 430±10 | 20nmTi+1200nmAu | 0~0.05 | 1 |
| M14 | Copper Coated Silicon Wafer | 6 | SSP | N100 | 675±25 | 2000nmCu | 1~100 | – |
| M15 | Aluminum Coated Silicon Wafer | 8 | SSP | P100 | 700±25 | 500nmAl | 1~100 | – |
| M18 | Copper Plated Si Wafer | 12 | SSP | P100 | 700±25 | 1000nmCu | 1~100 | – |
| M19 | Copper Coated Si Wafer | 12 | SSP | P100 | 700±25 | 500nmCu | 1~100 | – |
| M20 | Copper Plated Si Wafer | 6 | SSP | N100 | 625±25 | 125nmCu | 0.01~0.02 | – |
| M21 | Gold Coated Silicon Wafer | 2 | SSP | P100 | 400±15 | 10nmCr+100nmAu | 0~0.0015 | – |
| M22 | Gold Plated Silicon Wafer | 2 | SSP | N100 | 280±15 | 10nmCr+100nmAu | 0~0.05 | – |
| M33 | Platinum Coated Silicon Wafer | 2 | SSP | P100 | 430±15 | 30nmTi+150nmPt | 0~0.0015 | – |
| M34 | Gold Plated Si Wafer | 4 | DSP | 100 | 110±25 | 10nmCr-+50nmAu | 0.01~0.05 | – |
| M35 | Gold Plated Si Wafer | 6 | DSP | 100 | 200±25 | 10nmCr+50nmAu | 0.005~0.01 | – |
| M36 | Gold Coated Si Wafer | 6 | SSP | N100 | 625±25 | 10nmCr+50nmAu | 0.01~0.02 | – |
| M37 | Gold Coated Si Wafer | 4 | DSP | P100 | 200±10 | 50nmCr+10nmAu | 2~3 | – |
| M40 | Platinized Si Wafer | 4 | SSP | P100 | 515±15 | 300nmSi02+30nmTi+300nmPt | 0.008~0.012 | 2 |
| M41 | Platinized Si Wafer | 4 | SSP | P100 | 525±25 | 300nmSi02+30nnTi+300nmPt | 0.01~0.02 | 2 |
| M42 | Au Coated Si Wafer | 6 | DSP | 100 | 200±25 | 10nmCr+50nmAu | 0.005~0.01 | – |
| M43 | Pt Coated Si Wafer | 4 | SSP | P100 | 500±15 | 300nmSi02+30nmTi+150nmPt | 0~0.0015 | 2 |
| M44 | Pt Plated Si Wafer | 4 | SSP | P100 | 500±15 | 500nmSi02+30nmTi+150nmPt | 0~0.0015 | 2 |
| M46 | Au Plated Si Wafer | 4 | SSP | N100 | 525±15 | 30nmCr+125nmAu | 0~0.005 | – |
| M47 | Cu Plated Si Wafer | 4 | SSP | N100 | 525±15 | 30nmCr+100nmCu | 0~0.005 | – |
| M49 | Cu Plated Si Wafer | 4 | SSP | P100 | 525±15 | 30nmCr+100nmCu | 8~12 | 2 |
| M50 | Au Plated Si Wafer | 4 | SSP | N100 | 450±15 | 90nmSi02+10nmCr+100nmAu | 0.012~0.018 | – |
| M51 | Pt Coated Si Wafer | 4 | SSP | P100 | 500±10 | 280nmSi02+150nmPt | 0~0.0015 | 1 |
| M52 | Cr Coated Si Wafer | 4 | SSP | N100 | 525±25 | 200nmCr | 0.01~0.02 | 2 |
| M54 | Ag Coated Si Wafer | 4 | SSP | P100 | 500±10 | 30nmCr+200nmAg | 0~0.05 | 2 |
| M55 | Cu Coated Silicon Wafer | 4 | DSP | P100 | 500±10 | 20nmTi+100nmAu | 0~0.05 | 2 |
| M56 | Cu Plated Silicon Wafer | 4 | DSP | P100 | 500±10 | 20nmNi+100nmAu | 0~0.05 | 2 |
| M57 | Cu Coated Silicon Wafer | 4 | SSP | N100 | 500±10 | Non-polished surface 20nnTi+100nmAu | 1~3 | 2 |
| M58 | Silicon Wafer Coated with Gold | 4 | DSP | N100 | 525±25 | 20nmTi+100nmAu | 0~0.01 | 2 |
| M59 | Silicon Wafer Plated with Gold | 4 | SSP | P100 | 525±20 | Non-polished surface 20nmNi+100nmAu | 1-3 | 2 |
We also can offer Al coated silicon wafer (PAM200723-SI):
8″ Aluminized coated Si wafer
Diameter: 200+/-0.5mm
Type: P/Boron
Orientation: <100>
Resistivity: >0.5 ohm.cm
Thickness: 200um+/-50um
Notch: V
Surface: Polished/Etched
Coated layer: Ti 500A + Al 30,000A+/-10%
Take the platinum (Pt) coated silicon wafer for example: Since the platinum layer has high hardness, low resistance and good weldability, the conductivity, hardness and corrosion resistance of the platinized silicon wafer are increased, which make it can be used as a conductive substrate.
2. About Platinum Coating on Silicon Wafer
The metal deposition on silicon wafer refers to a metallization process that metallic thin-films deposited on the wafer to form conductive circuit. The metals are commonly gold, platinum, aluminum, copper, silver and so on. Metal alloys also can be used.
Vacuum deposition technology is often used in metallization process. While for the deposition process, sputtering, electron-beam evaporation, flash evaporation and induction evaporation are the usual methods for fabricating platinum film on Si wafer.
Silicon wafer is commonly used to deposit and grow ferroelectric thin film from sputtering sources. The temperature for sintering generally can reach 650~850°C. During the sintering, the stress changes greatly, and the tension or compression will decrease when it reaches gigapascals. After that, the typical stress of ferroelectric thin film is about 10o gigapascal. Pt thin film will appear small cracks when the temperature is over 750°C. Therefore, Pt metal layer in silicon wafer processing should be depositing at the temperature lower than 750°C.
For more information, please contact us email at victorchan@powerwaywafer.com and powerwaymaterial@gmail.com.