The SOS technology uses single crystal sapphire or spinel insulator material as the substrate and grows a single crystal silicon film through a high-temperature epitaxy process to fabricate semiconductor integrated circuits. It is a kind of SOI CMOS technology. The silicon on sapphire structure [...]
2019-05-16meta-author
PAM XIAMEN offers 3″ Silicon EPI Wafers.
Substrate
EPI
Comment
Size
Type
Res
Ωcm
Surf.
Thick
μm
Type
Res
Ωcm
3″Øx381μm
p- Si:B[111]
0.004-0.008
P/E
12.5±2.5
p- Si:B
2.35
n/p/p+
3″Øx381μm
p- Si:B[111]
0.004-0.008
P/E
140±10
n- Si:P
33.6
n/p/p+
3″Øx381μm
n- Si:As[111-4°]
0.001-0.005
P/E
5.5
n- Si:P
0.31 – 0.33
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
37.5
n- Si:P
0.6±10%
n/n+
3″Øx525μm
n- Si:P[111]
0.001-0.005
P/E
4.5
n- Si:P
1.1 – 1.4
n/n+, Sealed in cassettes of 24 wafers
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
5.5
n- Si:P
1.06±10%
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
11
n- Si:P
17.5±10%
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
12
n- Si:P
1.7±10%
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
12
n- Si:P
2.1±10%
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
12
n- Si:P
1.3±10%
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
12
n- Si:P
1.8±10%
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
12
n- Si:P
1.3±10%
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
12
n- Si:P
16±10%
n/n+
3″Øx381μm
n- Si:As[111]
0.001-0.005
P/E
13
n- Si:P
1.35±10%
n/n+
3″Øx381μm
n- [...]
2019-03-08meta-author
PAM XIAMEN offers BaSrTiO3 Film on substrate.
BaSrTiO3 Film ( 400nm) on Nb.SrTiO3(wt 0.7%), 10x10x0.5mm,1sp
Ba1-xSrxTiO3 is an excellent enhanced dielectronic film grown on Nb doped SrTiO3 conductive substrate via special spin coating:
Film Sppecifications:
Chemical composition: BaSrTiO3
Film thickness: ~ 400 nm
Crystalline: Polycrystal
Growth [...]
2019-04-26meta-author
PAM-XIAMEN offers p type electronic grade Germanium (Ge) wafer. Germanium is a chemical element. Its chemical symbol is Ge. Its atomic number is 32 and the atomic weight is 72.64, belonging to the IVA group elements. So the germanium electron configuration must have 32 [...]
2019-03-15meta-author
Highlights
•Fabrication scheme for heterogenous Si-to-InP circuits on wafer level is described.
•Wafer-to-wafer alignment accuracy better than 4–8 μm after bonding obtained.
•Interconnects with excellent performance up to 220 GHz demonstrated.
•Palladium barrier necessary when combining Al-based technology with gold based one.
Abstract
In order to benefit from the material [...]
PAM XIAMEN offers Silicon Carbide (SiC) Wafers and Crystals.
PAM XIAMEN offers the best prices on the market for high-quality silicon carbide wafers and substrates up to six (6) inch diameter with both N type and Semi-insulating types. Our SiC wafers have been widely [...]
2019-03-15meta-author