(10-11) Plane Si-GaN Freestanding GaN Substrate
PAM-XIAMEN offers (10-11) Plane Si-GaN Freestanding GaN Substrate
Item
PAM-FS-GAN(10-11)-SI
Dimension
5 x 10 mm2
Thickness
380+/-50um
Orientation
(10-11) plane off angle toward A-axis 0 ±0.5°
(10-11) plane off angle toward C-axis -1 ±0.2°
Conduction Type
Semi-Insulating
Resistivity (300K)
>106 Ω·cm
TTV
≤ 10 µm
BOW
BOW ≤ 10 µm
Surface Roughness
Front side: Ra<0.2nm, epi-ready;
Back side: Fine Ground or polished.
Dislocation Density
≤5 x 10 6cm-2
Macro Defect Density
0 cm-2
Useable Area
> 90% (edge exclusion)
Package
each in single wafer container, under nitrogen atmosphere, packed in class 100 clean room
For more information, please contact us email at victorchan@powerwaywafer.com and powerwaymaterial@gmail.com
2020-08-20meta-author
PAM XIAMEN offers 2″ Silicon Wafer.
Material
Orient.
Diam.
Thck
(μm)
Surf.
Resistivity
Ωcm
Comment
n-type Si:P
[111]
2″
330
P/E
3-7
SEMI Prime
n-type Si:P
[111]
2″
275
P/P
2.5-3.5
SEMI Prime
n-type Si:P
[111]
2″
5000
P/E
2.0-3.1
Prime, NO Flats, Individual cst
n-type Si:P
[111]
2″
5000
P/E
2-3
Prime, NO Flats, Individual cst
n-type Si:P
[111-8°]
2″
280
P/E
1.3-1.8
SEMI Prime,
n-type Si:P
[111-3.5°]
2″
280
P/E
1-30
SEMI Prime,
n-type Si:P
[111-2.5°]
2″
500
C/C
1-20
SEMI Prime
n-type Si:P
[111]
2″
7500
P/E
1-10
SEMI Prime, , Individual cst
n-type Si:Sb
[111-3°]
2″
300
P/E
~0.02
SEMI Prime
n-type Si:Sb
[111-1° towards[112]]
2″
500
P/E
0.017-0.026
SEMI Prime,
n-type Si:Sb
[111-2°]
2″
200
P/E
~0.01
SEMI Prime,
n-type Si:Sb
[111]
2″
280
P/E
0.01-0.02
SEMI Prime,
n-type Si:Sb
[111-2°]
2″
280
P/E
0.008-0.020
SEMI Prime,
n-type Si:As
[111]
2″
300
P/E
0.0030-0.0034
SEMI Prime,
n-type Si:As
[111]
2″
300
P/E
0.001-0.005
SEMI Prime,
n-type Si:As
[111-4°]
2″
350
P/E
0.001-0.005
SEMI [...]
2019-03-07meta-author
PAM XIAMEN offers 6″FZ Silicon Wafer.
Silicon wafers, per SEMI Prime,
P/E 6″ {150.0±0.5mm}Ø×1,000±25µm,
FZ p-type Si:B[111]±0.5°, Ro > 5,000 Ohmcm,
One-side-polished, Particles: <10@≥0.3µm,
back-side etched, One SEMI Flat (57.5mm), Edges: rounded,
Sealed in Empak or equivalent cassette,
BOW<30µm, MCCLifetime>1000µs.
For more information, please [...]
2019-08-22meta-author
GaN-On-Si Key Patent Analysis
The size of sapphire substrates is increasing to response to the current trend toward the low LED price, but it is actually hard to grow sapphire single crystals to a large size. For this reason, research on adopting silicon that has [...]
2012-12-19meta-author
What is the Growth Facet?
In the central region of SiC {0001} wafer, the doping concentration is usually relatively high, such as the dark color observed in the central region, which is due to the enhanced impurity doping in facet growth, as shown in Fig. [...]
2021-01-22meta-author
The edges and notches of silicon wafers are usually machined by diamond grinding, and the grinding-induced subsurface damage causes wafer breakage and particle contamination problems. However, the edge and notch surfaces have large curvature and sharp corners, thus it is difficult to be finished [...]
2019-07-22meta-author
