SiC JFET Epiwafer *S

Wide bandgap (WBG) semiconductors, such as silicon carbide (SiC) and gallium nitride (GaN), exhibit excellent performance in terms of efficiency, power density, and high-voltage blocking ability. In the process of utilizing WBG materials, different SiC based power semiconductor device structures have been manufactured for power applications, such as transverse or vertical junction gate field-effect transistors (JFETs) and planar and trench metal oxide field-effect transistors. SiC JFET and MOSFET devices are unipolar devices with high switching speed, mainly suitable for the range of 0.6~10kV. PAM-XIAMEN can epitaxially grow SiC wafers for JFET fabrication, take the following epi structure for example.

1. SiC JFET Epitaxial Structure

Epi layer	Material	Thickness	Doping Concentration
Drift layer	N- SiC	10um	–
Substrate	N+ SiC		1E18 cm-3

 

2. What Is JFET and Its Working?

JEFT is a normally open field-effect transistor that controls the width of the depletion layer of the PN junction by applying different reverse voltages between the gate G and the source S, causing the width of the conductive channel from the drain D to the source S to change, thereby controlling the current Ids.

For depletion type JFETs, the channel resistance is minimized at equilibrium (without voltage applied). Both voltage Vds and Vgs can change the width of the p-n junction barrier of the gate, thereby changing the length and thickness of the channel (gate voltage causes uniform changes in channel thickness, source drain voltage causes uneven changes in channel thickness), causing changes in channel resistance and resulting in changes in Ids, in order to amplify the input signal.

When Vds is low, the channel of JFET exhibits resistance characteristics, which is the so-called resistance working region. At this time, the drain current basically increases linearly with the increase of voltage Vds, but the drain current increases in a square formula with the increase of gate voltage Vgs; When Vds is further increased, the channel is first pinched off at the drain end, and the drain current reaches its maximum and saturates (the saturation current is determined by the resistance of the channel that is not pinched off). This is the saturation amplification region of the JFET, where it appears as a constant current source.

3. SiC JFET vs MOSFET

Due to the imperfect characteristics of the silicon carbide MOS structure, the SiC JFET structure with the same unipolar operation has received attention and has been commercialized first. Compared to power devices with MOS structure, the gate of JFET structure adopts reverse biased P-N junction to regulate the conduction channel, so it is not limited by reliability problems caused by gate oxide layer defects and low carrier mobility. The same unipolar working characteristics enable it to maintain good high-frequency working ability. Before MOS devices completely solve the problems of channel mobility, silicon carbide JFET devices seem to show a more favorable development trend, and its advantages compared with MOSFET devices have become a key focus of attention for next-generation device applicants.

Fig. 1 Comparison of driver settings between SiC MOSFET and SiC JFET

The working principle and structural differences of gate electrodes largely determine the significant performance differences between JFETs and MOSFETs. In addition to greatly improving the conductivity by avoiding the influence of gate oxide layer defects, silicon carbide JFET devices also have the following additional characteristic advantages:

1) Stability of threshold Voltage with temperature. Compared to using MOSFET inversion layer to regulate the conduction channel, the decrease in gate threshold voltage of JFET devices with temperature is smaller than that of MOSFETs. This is because the built-in electric field of P-N junction that varies with temperature is much smaller than the pinch off voltage, which is extremely important for stable switching operation in high-temperature environments and reduces the possibility of false triggering of similar MOSFET devices at high junction temperatures.

2) Good high-temperature reliability. Due to the lack of reliability issues caused by the quality of the gate oxide layer, SiC JFET devices clearly have very good ruggedness, and currently have a higher operating junction temperature range than MOSFETs, without worrying about time-dependent insulation breakdown caused by long-term high-temperature operation.

Whether you need SiC epitaxy for research or for industrial applications, please contact us email at [email protected] and [email protected].