Professional SiC Wafer Grinding and Thinning Processing Services

Silicon carbide (SiC), as a wide bandgap semiconductor material, has broad application prospects in high-temperature, high-frequency, and high-power devices. However, due to its low intrinsic fracture toughness, SiC wafers are prone to cracking and damage during thinning processing, making thinning technology one of the key challenges restricting its industrial application. At present, the thinning of SiC wafers is mainly achieved through grinding and polishing. PAM-XIAMEN can provide SiC wafer thinning services, please consult: [email protected].

 1. Research Status of Thinning Technology

The current thinning processing of SiC wafers mainly relies on grinding and polishing as the main technical route. The most representative grinding method is self rotating grinding: while the wafer rotates, the spindle mechanism drives the grinding wheel to rotate and feed downwards, thereby achieving material removal. Although this process has high efficiency, it has problems such as easy passivation of the grinding wheel, short service life, and susceptibility to surface/subsurface damage. To improve processing quality, researchers have developed various auxiliary processes, mainly including:

Ultrasonic vibration assisted grinding: By applying ultrasonic vibration, the grinding force and wheel wear are effectively reduced, significantly improving the surface quality of hard and brittle materials during machining;

Electrolytic in-process dressing (ELID): By electrolytic action, an oxide film is formed on the surface of the grinding wheel, delaying the wear of the grinding wheel, and using detached abrasive particles to achieve a grinding effect similar to free abrasive particles, thereby improving surface quality.

In terms of grinding, the process can be divided into two methods: single-sided and double-sided grinding. Small sized SiC wafers have gradually achieved single/double-sided grinding processing. Grinding usually uses boron carbide or diamond abrasives, and is divided into:

Coarse grinding: using larger abrasive particles, aimed at removing slicing knife marks and metamorphic layers;

Fine grinding: using fine-grained abrasive particles to eliminate the damage layer caused by rough grinding and improve surface roughness.

2. Necessity of Wafer Thinning and Packaging Requirements

Wafer thinning is a key step in the packaging process, and its main purposes include:

Improving wafer quality: Thin wafers have lower hardness and are less prone to cracking and unevenness during cutting;

Satisfy the demand for device thinning: especially in chip stacking and advanced packaging, thinning can significantly reduce the overall thickness;

Improve bonding quality: Remove the backside oxide layer to provide a clean and flat surface for bonding;

Enhance heat dissipation performance: shorten the heat conduction path, improve chip heat dissipation efficiency and operational stability.

Different packaging forms have clear requirements for wafer thickness:

Packaging Forms	Wafer Thickness
Wire Bond	100–200 μm
Traditional packaging (QFP, DIP etc.)	~300 μm
BGA Packaging	100–200 μm
CSP Packaging	50–100 μm
Stacked Packaging	Can be lower than 30 μm

 

3. Research on SiC Thinning Process

Researchers conducted SiC wafer grinding experiments, focusing on analyzing the effects of parameters such as wheel size, feed rate, wheel speed, and worktable speed on surface damage. They found that the depth of surface damage significantly increases with the increase of wheel feed rate; By reducing the grain size of the grinding wheel, improving grain uniformity, reducing feed rate, and increasing the speed of the grinding wheel and worktable, wafer damage can be effectively reduced. In addition, SiC wafers treated with annealing have better processability, finer surface scratches, reduced edge breakage, and improved integrity.

Whether you need SiC wafer for research or for industrial applications, please contact us email at [email protected] and [email protected].