How Do Micro Defects in Silicon Single Crystals Affect Device Performance?

Silicon single crystals have become an indispensable foundation for modern electronics industry due to their excellent electrical properties and stability. PAM-XIAMEN can offer various types of Silicon wafers, more specifications please refer to https://www.powerwaywafer.com/silicon-wafer. However, even the purest silicon single crystal cannot avoid the existence of micro defects. These micro defects, like time bombs hidden inside materials, pose a potential threat to device performance. This article explores the impact of micro defects on device performance and their causes, and seeks effective methods to reduce these defects.

1. What Is a Micro Defect?

Micro defects in silicon single crystals usually refer to the macroscopic defect patterns observed in the transverse section of dislocation free single crystals in the growth direction after being corroded by a Sirl etching solution in a vortex like distribution, hence commonly known as vortex defects. On a microscopic level, these vortex patterns are composed of shallow corrosion pits. In fact, vortex defects are only a manifestation of micro defects in silicon single crystals, and the defect patterns that exhibit vortex distribution are not all micro defects. However, as a special case of micro defects, research on vortex defects is more in-depth.

2. What Impact Do Micro Defects Have on Device Performance?

The existence of micro defects is like time bombs hidden inside silicon single crystals, which can have a fatal impact on device performance at any time, as shown in table 1. Specifically, micro defects can lead to a decrease in the carrier lifetime of the material, thereby reducing the amplification factor (h) of the device. During the device manufacturing process, vortex defects may also transform into dislocations, layer faults, and form local precipitates, which can cause micro plasma breakdown or increase the reverse current of PN junctions. For high-power high back pressure devices, the presence of micro defects can degrade their performance; For CCD (charge coupled device), micro defects may lead to the generation of dark current spikes; For integrated circuits, micro defects have a serious impact on their yield.

Types of Micro-Defects
Types	Growth Rate(mm/min)	Location	Defect Concentration(cm^-3)		Diameter of Erosion Pit(um)
Types	Growth Rate(mm/min)	Location	Etching	Decorating	Diameter of Erosion Pit(um)
A	<4.0~4.5	Along the growing stripes	10⁸~10⁹	10⁶~10⁷	30~120
B	5.0	Along the growing stripes	10⁹~10¹⁰	10⁹	3~18
C	6.0	Between the B group area and the dislocation free area	10¹⁰~10¹¹	10⁷	0.3~3.0
D	>6.0	Central random distribution	0¹⁰~10¹¹	/	0.9~1.0

3. Formation of Micro Defects

In order to eliminate micro defects and obtain high-quality silicon single crystals, extensive research has been conducted on the causes of micro defect formation, and various mechanisms have been proposed. However, there is still no unified theory to explain the mechanism of micro defect formation in silicon single crystals. The following are several popular viewpoints currently:

3.1 Non Equilibrium Self Interstitial Atomic Model

Petrof and Dijk observed through transmission electron microscopy that A-type vortex defects are individual dislocation loops with an average size of 1mm, or clusters composed of dislocation loops. They believe that most dislocation loops are insertion type non intrinsic loops, and a few loops are extraction type loops. However, despite the use of very precise experimental techniques, the essence of B-type defects has not been distinguished. Most researchers believe that B-type defects are unlikely to be dislocation loops, but rather smaller in size and weaker in lattice distortion intensity. Based on the above experimental results and Weber’s crystallization theory, they proposed that type A defects are formed by excess non-equilibrium self interstitial atoms trapped in the crystal during the crystallization process. However, experiments have shown that when the growth rate is low and the crystal is cooled at a slow rate, both type A and type B defects disappear; If the crystal is cooled at a faster rate, both type A and type B defects will be present in the crystal. This indicates that the self interstitial atoms do not come from the melt, which raises questions about the validity of the non-equilibrium self interstitial atom model.

3.2 Balanced Self Interstitial Atomic Model

Föll et al. also demonstrated using high-pressure transmission electron microscopy that type A defects are dislocation loops, but their characteristics are not fundamentally different from those observed by Dijk et al. However, Fuer et al. believe that the observed dislocation loops are all non intrinsic insertion loops. They also studied the relationship between the size, type, and density of A-type dislocation loops and the carbon content in the crystal. It was found that the density of dislocation loops increases with the increase of carbon content, while their size decreases. When the carbon content decreases, the shape of dislocation loops becomes more complex. Based on the experimental results of self diffusion, quenching, and irradiation damage in silicon crystals, as well as the calculation of the formation energy of point defects, it was found that the equilibrium point defects in crystals at high temperatures are mainly self interstitial atoms of silicon rather than vacancies. However, this model assumes that the concentration of self interstitial atoms is independent of growth conditions, so the relationship between vortex defects and growth parameters cannot be well explained. Furthermore, Fur et al. did not provide appropriate answers regarding the role of oxygen and the migration and condensation of extended interstitial states.

In addition to the above two models, others have proposed droplet models, SiC complexes, and pure vacancy models. However, these models have certain limitations and cannot fully explain the formation mechanism of micro defects in silicon single crystals.

4. Effective Methods to Reduce Micro Defects

Through years of research and practice, effective methods have been found to reduce or even eliminate these defects.

4.1 Optimizing the Si Crystal Pulling Process

Taking appropriate measures during the process of drawing silicon single crystals can avoid the generation of micro defects. Specifically, the density of vortex defects can be reduced by reducing the carbon content in the single crystal; By increasing the pulling speed and cooling rate of the crystal, point defects are frozen in the crystal, preventing them from reaching the size of collapse and eliminating vortex defects; By reducing the pulling speed and controlling the cooling rate, point defects can diffuse to the crystal surface and disappear; By adding a certain proportion of hydrogen gas to the protective gas argon to increase vacancy concentration and enhance the recombination rate with self interstitial atoms, vortex defects can be reduced or even eliminated.

4.2 Processing of Si Single Crystals with Existing Micro Defects

For single crystals that already have micro defects, the number and density of micro defects can be reduced by adopting appropriate annealing processes or utilizing absorption techniques. Although these methods cannot completely eliminate micro defects, they can improve the quality of silicon single crystals and enhance their device performance to a certain extent.

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