Silicon on Sapphire (SOS)

Silicon on Sapphire (SOS)

Silicon on Sapphire (SOS) Wafers can be offered by PAM-XIAMEN. The SOS technology uses single crystal sapphire or spinel insulator material as the substrate and grows a single crystal silicon film through a high-temperature epitaxy process to fabricate semiconductor integrated circuits. It is a kind of SOI CMOS technology. The silicon on sapphire structure can provide ideal isolation and reduce the parasitic capacitance at the bottom of the PN junction. Therefore, it is suitable for making high-speed large-scale silicon-on-sapphire integrated circuits to achieve high speed and low power consumption. Detailed specs please see below:

Silicon on Sapphire

1. SOS Wafer Specs

Silicon-on-Sapphire (11-02, R Plane ), 100mm Dia x 0.46mm,2sp, Film: 0.5 um thick,

Silicon-on-Sapphire (11-02, R Plane ), 100mm Dia x 0.46mm,2sp, Film: 0.6 um thick,

Silicon-on-Sapphire (11-02, R Plane ), 100mm Dia x 0.46mm,2sp, Film: 1.0 um thick,

Silicon-on-Sapphire (11-02, R Plane ), 100mm Dia x 0.5mm,1sp, Film: 0.6 um thick,

Silicon-on-Sapphire (11-02, R Plane ), 10mmx 10mmx0.46mm,2sp, Film: 0.5 um thick

Silicon-on-Sapphire (11-02, R Plane ), 10mmx 10mmx0.46mm,2sp, Film: 0.6 um thick

Silicon-on-Sapphire (11-02, R Plane ), 10mmx 10mmx0.46mm,2sp, Film: 1.0 um thick

Silicon-on-Sapphire (11-02, R Plane ), 10mmx 5mmx0.46 mm,2sp, Film:0.5um thick

Silicon-on-Sapphire (11-02, R Plane ), 10mmx10mm x0.5mm,,1sp film: 0.6um thick

Silicon-on-Sapphire (11-02, R Plane ), 5mmx 5mmx0.46 mm,2sp, Film:0.5um thick

Silicon-on-Sapphire (11-02, R Plane ), 5mmx 5mmx0.46 mm,2sp, Film:0.6um thick

Silicon-on-Sapphire (11-02, R Plane ), 5mmx 5mmx0.46 mm,2sp, Film:1.0um thick

2. How to Grow Silicon Wafers on Sapphire Substrate ?

The equipment and basic process of silicon-on-sapphire epitaxial wafer growth are the same as general silicon homoepitaxial growth. The cutting, polishing, and cleaning of the substrate are roughly the same. Because the sapphire is harder than silicon, the grinding and polishing time is longer.

During the silicon on sapphire process, it is worth noting that the self-doping effect is more serious. Because under the conditions of SoS epitaxial growth, the following reactions will occur on the surface of the substrate:

Al2O3(s)+2HCl(g)+2H2(g)=2A1Cl(g)↑+3H20(g)

The aluminium subchloride is gaseous, which causes the sapphire substrate to be corroded and causes defects in the Si epitaxial layer. In addition, H2 and deposited silicon will also corrode the substrate, and the reaction is:

2H2(g)+al2O3(s)=al20(g)↑+2H2(g)
5Si(s)+2al2O3(s)=al20(g)↑+5Si(g)↑+2Al(s)

Before the surface of the substrate is completely covered by Si (at least the epitaxial layer grows to 10-20nm), the above-mentioned corrosion reactions are all proceeding. After the substrate surface is covered, these corrosion reactions will also occur on the back of the substrate, causing contamination such as AlO. In addition, because the substrate surface is corroded, defects in the silicon epi layer will increase, and even localized polycrystalline. SiCl4 corrodes the substrate more than SiH4, so SiH4 thermal decomposition method is more beneficial for SOS epitaxial growth.

In order to solve the contradiction between growth and corrosion, epitaxial growth methods, like dual-rate growth and two-step epitaxy, can be used. The dual-rate growth method uses a high growth rate (1~2μm/mn) to quickly cover the sapphire substrate surface (growth 100~200nm). Then, it grows to the required thickness at a low growth rate (about 0.3m/min).

The two-step epitaxy method is combined with the advantages of the two systems SiH4/H2 and SiCl4H2. That is, the SiH4/H2 system is used to quickly cover the surface of the substrate, and then the SiCl4/2 system is used to grow to the required thickness.

SOS epitaxial growth inevitably introduce high-density dislocations, twins, grain boundaries and other lattice defects in the epitaxial layer due to the mechanical damage of the substrate surface and the corrosion between the growth composition and the substrate, lattice mismatch, improper valence bond, strain effect and other factors. These defects interact with heavy metal impurities such as Cu and Fe to form a series of deep energy levels in the forbidden band. In addition, there are crystal defects, reducing  the lifetime of the carrier concentration, mobility and minority carrier. Therefore, the quality of Si epi-layer on sapphire wafer is not so good than that on silicon substrate, and the thinner the epitaxial layer, the worse the performance. However, the Si on sapphire substrate can meet the requirements of MOS devices.

3. Silicon on Sapphire Disadvantages

SOS is a hetero-epitaxial structure. The defect density of silicon film is relatively high, so the minority carrier lifetime is short (1-10 nanoseconds), and it is not suitable for making bipolar devices and charge-coupled devices. The leakage from the edge of the silicon island and the back interface (silicon film-sapphire interface) must be suppressed by special methods. The distortion of the drain current from the floating substrate makes the CMOS/SOS structure unfavorable for its application in analog technology. The sapphire single crystal has a high melting point and high hardness, so it is difficult to prepare and process the single crystal.

In the future, for silicon on sapphire manufacturers, improving the crystal integrity of the SOS epitaxial layer, reducing the self-doping, making its performance close to the level of the homogeneous silicon epitaxial layer and having good thermal stability are important issues for the development of silicon on sapphire technology.

For more information, please contact us email at [email protected] and [email protected].

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