With different fabrication process from the traditional ones, SiC power device cannot be directly made on single crystal SiC materials. It’s obligatory to grow high-quality epitaxial materials on the conductive single crystal substrate to produce different devices on the epitaxial layers.
SiC usually adopts the PVT method with the temperature as high as 2000℃. Due to relatively long processing cycle and low output, the cost of SiC substrate is very high.
The epitaxial process of SiC wafer is almost the same as that of silicon except for the different temperature and structure design of the device.
With regard to device fabrication, the production process of devices is different from that of silicon due to material particularity and high-temperature technology is adopted including high-temperature ion implantation, high-temperature oxidation and high-temperature annealing.
The epitaxial technology is very critical in the whole industry because all devices are basically fabricated on the epitaxial layers nowadays and the quality of epitaxial layers plays a vital role on the performance of devices. However, the quality of epitaxial layers is also influenced by crystal and substrate processing as the intermediate link with a critical role in the industrial development.
Key Parameters of SiC Epitaxial Wafer
The most basic and critical parameters of SiC epitaxial materials are the uniformity of thickness and doping concentration indicated.
Actually, the epitaxial parameters we refer to are mainly determined by the design of devices. For example, the devices with different voltage levels usually have different epitaxial parameters.
Generally speaking, the epitaxial thickness is usually 6 μm for the devices of as low as 600V while the thickness may increase to 10~15 μm for the devices of medium voltage between 1200V to 1700V. If the voltage is more than 10,000V, the thickness may reach as high as over 100 μm. Therefore, the epitaxial thickness increases with the voltage level. It is very difficult to fabricate the high-quality epitaxial wafers especially in the field of high voltages. For instance, the control of defects is so important that it’s a very big challenge as a matter of fact.
SiC epitaxial defects usually include fatal and non-fatal ones:
Fatal defects, such as triangle defects and drips, may influence all types of devices including diodes, MOSFET and bipolar devices, especially the breakdown voltage which can be reduced by 20% or even drop to 90%.
Non-fatal defects, such as TSD and TED, may have no influence on the diode, however the service life of MOS and bipolar devices may be shortened, or the qualification rate of device processing may be affected due to the electric leakage.
Three ways to control SiC epitaxial defects: 1. Select the SiC substrate materials carefully; 2. Equipment selection and localization; 3. Processing technology.