Thermal Oxide Wafers, 2 – 4″ Research Grade-4

PAM XIAMEN offers Thermal Oxide Wafers, 2 – 4″ Research Grade.

Thermal oxide or silicon dioxide layer is formed on bare silicon surface at temperature range from 900°C ~ 1200°C . Compared to CVD deposited oxide layer, thermal oxide has a higher uniformity, and higher dielectric strength. In most silicon- based devices, thermal oxide layer play an important role to pacify the silicon surface , to act as doping barriers and as surface dielectrics .

Thermal Oxide Wafer 4″ Dia.

1、Thermal Oxide Wafer 4″ Dia.–Undoped N-type

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.50 mm t,undoped N type, 1SP R:>10000 ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.50 mm t,undoped N type, 1SP R:>5000 ohm.cm

 

2、Thermal Oxide Wafer 4″ Dia.-Doped N-type

Thermal Oxide Wafer: 100 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm , N type , P doped, 1SP R: 0.1-1.0ohm.cm

Thermal Oxide Wafer: 285 nm SiO2 Layer on Si (100) 4″dia x 0.5 mm t, N type, P doped , 1SP R: 1-10 ohm.cm

Thermal Oxide Wafer: 285nm SiO2 Layer on Si (100)( one side), 4″diax0.5 mm t, N type P doped,1SP R: 1-10 ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, N type ,As-doped 1SP ,R:0.001-0.005 ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (111), 4″dia x 0.525 mm t, N-type ,Sb-doped 1SP R:0.018- 0.02 ohm.cm

Thermal Oxide Wafer: 500 nm SiO2 Layer on Si (100), 4″dia x 0.50 mm t, N-type ,P doped 1sp ,0.01-0.1 ohm.cm

Thermal Oxide Wafer: 100 nm SiO2 on Si (100), 4″dia x 0.525 mm, N type ,As-doped 1SP, R< 0.005 ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.50 mm t, N type, 1SP R:1-10 ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, N type,P doped 1SP R: 0.1-1.0 ohm.cm

Thermal Oxide Wafer: 300nm SiO2 Layer on Si (100), 4″diax0.5mm t, N-type ,Sb-doped 1SP R:0.01- 0.02 ohm-cm

Thermal Oxide Wafer: 1000 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, N-type, P doped 1sp, R: 1-10 ohm.cm

 

3、Thermal Oxide Wafer 4″ Dia.–Doped-P-type

Thermal Oxide Wafer: 100 nm SiO2 Layer on front side of Si (100), 4″dia x 0.525 mm t, P-type ,B-doped 1SP R:0.001-0.005 ohm.cm

Thermal Oxide Wafer: 100 nm SiO2 Layer on Si (100), 4″dia x 0.50 mm t, P-type ,B-doped 1SP R:1-10 ohm.cm

Thermal Oxide Wafer: 100 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, P-type ,B-doped 1SP R:< 0.005 ohm.cm

Thermal Oxide Wafer: 1000 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, Ptype , 1SP,R:1-20 ohm.cm

Thermal Oxide Wafer: 90 nm SiO2 Layer on Si (100), 4″dia x 0.50 mm t, P-type ,B-doped 1SP R:1-10ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, P type, 1SP R:0.001-0.005 ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, P type, 1SP R:0.01-0.05 ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, P type, 1SP R:1-10 ohm.cm

Thermal Oxide Wafer: 300 nm SiO2 Layer on Si (100), 4″dia x 0.525 mm t, P type, 2SP R:1-20 ohm.cm

For more information, please visit our website: https://www.powerwaywafer.com,
send us email at sales@powerwaywafer.com and powerwaymaterial@gmail.com

Found in 1990, Xiamen Powerway Advanced Material Co., Ltd (PAM-XIAMEN) is a leading manufacturer of semiconductor material in China. PAM-XIAMEN develops advanced crystal growth and epitaxy technologies, manufacturing processes, engineered substrates and semiconductor devices. PAM-XIAMEN’s technologies enable higher performance and lower cost manufacturing of semiconductor wafer.

PAM-XIAMEN develops advanced crystal growth and epitaxy technologies, range from the first generation Germanium wafer, second generation Gallium Arsenide with substrate growth and epitaxy on III-V silicon doped n-type semiconductor materials based on Ga, Al, In, As and P grown by MBE or MOCVD, to the third generation: Silicon carbide and Gallium Nitride for LED and power device application.

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