From the perspective of the cross-sectional structure of integrated circuits, most integrated circuits are fabricated on the shallow surface layer of the silicon base material. Due to the requirements of the manufacturing process, high requirements are placed on the dimensional accuracy, geometric accuracy, surface cleanliness and surface micro lattice structure of the wafer. Therefore, in hundreds of process flows, thinner wafers cannot be used, and only wafers with a certain thickness can be used to transfer and tape out during the process. Usually, before the integrated circuit is packaged, a certain thickness needs to be removed from the backside of the wafer substrate. This process is called wafer backside thinning process. The wafer thinning is also known as wafer grinding. The existing wafer thinning technologies mainly include rotary table grinding and wafer self-rotation thinning.
Conventional process of wafer thinning can reach following level:
Thinning/polishing to 80-100um
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Wafer Thinning Process
The function of the wafer thinning process is to grind the backside base material of the functional wafer (mainly silicon wafer) to remove a certain thickness of material. It is beneficial to the requirements of the subsequent packaging process and the physical strength, heat dissipation and size requirements of the chip.
In addition, the wafer thinning has the following advantages to the chip:
1) The heat dissipation efficiency will be significantly improved. As the chip structure becomes more and more complex, the integration becomes higher and higher, and the number of transistors increases sharply, heat dissipation has gradually become a key factor affecting the performance and life of the chip. Thin chips are better for heat dissipation from the substrate.
2) Reduce the size of the chip package, but increase the proportion of effective functional volume. Microelectronic products are increasingly developing in the direction of light, thin and short, so the reduction in thickness also reduces the size of the chip accordingly.
3) Reduce the internal stress of the chip. The thicker the chip thickness, the internal stress is generated on the back of the chip due to the heat generated during the working process of the chip. The heat of the chip increases, and the thermal difference between the substrate layers increases, which increases the internal stress of the chip, and the large internal stress causes the chip to crack.
4) Improve electrical performance. The thinner the wafer thickness, the closer the ground plane is to the backside gold plating, the better the high frequency performance of the device
5) Improve the yield of dicing processing. Thinning the semiconductor wafer can reduce the amount of processing during packaging and dicing, avoid defects such as chipping in the dicing, and reduce the probability of chip damage.
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