2-3.Wafer Flat Length
Linear dimension of the at measured with ANSI certied digital calipers on a sample of one wafer per ingot.
2-3.Wafer Flat Length
Linear dimension of the at measured with ANSI certied digital calipers on a sample of one wafer per ingot.
3-4. Step Bunching Step bunching is visible as a pattern of parallel lines running perpendicular to the major at. If present, estimate the % of speci ed area affected.
2-16.Pits Individual distinguishable surface anomalies, which appears as a depression in the wafer surface with a lengthto-width ratio less than 5 to 1, and visible under high intensity illumination.
3-12. Silicon Droplets Silicon droplets can appear as either small mounds or depressions in the wafer surface. Normally absent, but if present are largely concentrated at perimeter of wafer. If present, estimate the % of speci ed area affected.
5-4-3 Growth of Hexagonal Polytype SiC Wafers In the late 1970s, Tairov and Tzvetkov established the basic principles of a modified seeded sublimation growth process for growth of 6H-SiC. This process, also referred to as the modified Lely process,was a breakthrough for SiC in that [...]
5-6 SiC Electronic Devices and Circuits This section briefly summarizes a variety of SiC electronic device designs broken down by major application areas. SiC process and material technology issues limiting the capabilities of various SiC device topologies are highlighted as key issues to be addressed [...]
2-10.Cracks A fracture or cleavage of the wafer that extends from the frontside surface of the wafer to the back-side surface of the wafer. Cracks must exceed 0.010” in length under high intensity illumination in order to discriminate fracture lines from allowable crystalline striations. Fracture [...]