2-5.Misorientation
In wafers cut intentionally “off orientation”, the angle between the projection of the normal vector to the wafers
surface onto a {0001} plane and the projection on that plane of the nearest <11-20> direction.
5-4-4-2 SiC Epitaxial Growth Polytype Control Homoepitaxial growth, whereby the polytype of the SiC epilayer matches the polytype of the SiC substrate, is accomplished by “step-controlled” epitaxy . Step-controlled epitaxy is based upon growing epilayers on an SiC wafer polished at an angle (called the [...]
5-3-2 High-Power Device Operation The high breakdown field and high thermal conductivity of SiC coupled with high operational junction temperatures theoretically permit extremely high-power densities and efficiencies to be realized in SiC devices. The high breakdown field of SiC relative to silicon enables the blocking voltage region [...]
2-29.Resistivity The resistance to current flow and movement of electron and hole carries in the silicon carbide. Resistivity is related to the ratio of voltage across the silicon to the current flowing through the silicon carbide per unit volume of silicon carbide. The units for [...]
2-35.Prime Grade Prime Grade:The highest grade of a silicon carbide wafer. SEMI indicates the bulk, surface, and physical properties required to label silicon carbide wafers as “Prime Wafers”.
5-5 SiC Device Fundamentals To minimize the development and production costs of SiC electronics, it is important that SiC device fabrication takes advantage of existing silicon and GaAs wafer processing infrastructure as much as possible. As will be discussed in this section, most of the [...]
2-34.Chemical Mechanical Polishing Chemical Mechanical Polishing/Planarization is short as CMP, a process of smoothing surfaces with the combination of chemical and mechanical forces. It can be thought of as a hybrid of chemical etching and free abrasive polishing.
