PAM-XIAMEN offers GaN on Si HEMT wafer for Power, D-mode. Because of the heterojunction structure of GaN and AlGaN, the GaN HEMT on Si Substrate structure has one important property of high electron mobility. The HEMT Si wafers can be for device fabrication as well as process monitoring. More specific info about the 2DEG HEMT wafer structure, please see below:
1.Structures of GaN on Si HEMT Epi Wafer
1.1 D-MODE GaN on Silicon HEMT Wafer Structure
|2″, 4″, 6″,8″
|AlGaN/GaN HEMT structure
|AFM RMS (nm）of 5x5um2
|SiN passivation layer
|u-GaN cap layer
|AlGaN barrier layer
|Si wafer thickness (μm)
|675um(2″), 1000um(4″), 1300um(6″), 1500um(8″)
1.2 AlGaN/GaN on Si HEMT Structure
1.3 GaN on Si HEMT Epitaxy
|Top Epi Layer Stack
|Type of Substrate
|Silicon <111> +/- 0.5º
|High Voltage Buffer
|3 to 5.5µm
|GaN (thickness vendor to specify)
|Cap Layer ( for AlGaN)
|+/- 50µm max
|Vertical / Lateral Break down voltage
|> 1000 V
|Leakage Current Vertical
|<100nA / mm at 600V
|Electron Mobility (AlGaN)
|Sheet Charge Density (AlGaN)
|6 inch (150mm) Semi-Standard
|Crystal Growth Method
Kindly note for the wafer inspection:
1/For AlGaN content uniformity, AlGaN thickness uniformity, and pGaN content uniformity of GaN/Si HEMT wafer, the data we provided are multi-point.
2/As for particles on Gan on Si wafer, our detection equipment can identify the particles with diameter >10um and the less than 200 particles with diameter >10um;
3/We provide sample test data of the GaN HEMT wafer when shipping.
2. What is a D Mode GaN HEMT ?
The interface between the AlGaN and GaN materials in the GaN on Si HEMT epitaxial wafer forms a layer of high-mobility electrons called “two-dimensional electron gas (2DEG)” due to the crystal polarity, which forms a natural layer between the source and drain of GaN on Si power device. The channel gives the GaN HEMT an inherent normally-on property, that is, a depletion mode (D-type) device.
The normally-on characteristic is the main obstacle to the application of GaN on Si HEMT, because in the power converter when the gate drive outputs zero voltage, the switch must be kept in the normally-off state, and the negative turn-off gate voltage of GaN HEMTs requires higher complexity of the gate drive circuit, and also increases the risk of circuit failure. Therefore, D-type GaN HEMT and silicon-based low-voltage E-type MOSFET are usually packaged together to form a cascode device. The drain-source voltage of the MOSFET determines the gate-source voltage of the HEMT, forming a normally-off device, and its driving circuit can be driven by a traditional silicon-based device.
3. FAQ for D Mode GaN on Silicon HEMT Wafer
Q1: In the quotation for GaN on Si wafers for power I saw that the AlGaN has both a GaN and a Si3Nx cap.
Is this Si3Nx cap grown in-situ or is it deposited later?
Also, If it is in-situ, is it possible to get a 3nm Si3Nx cap without a GaN cap?
A: The Si3Nx cap of GaN on Si HEMT epitaxial wafer grown is In-situ.
Yes, 3nm Si3Nx cap without a GaN cap is available.
Q2: For Si based GaN HEMT epitaxial wafer, when the Gate Voltage is not applied, the D-mode wafer is in the normally open state of the Channel, and the E-mode one is in the closed state of the Channel. Can I understand it this way?
A: Yes, your understanding is right.