Q: What is the highest temperature and the highest thermal shock that the wafers can withstand?
A: At the temperatures higher than 1000 C on the free surface of Si-face of 6H-SiC (0001) the carbon segregation properties are started so that during short time the thin [...]
2012-06-06meta-author
Q:Dislocation density < 1E8 of GaN on sapphire from what kind of characterization?
A:Considering edge dislocation and mixing dislocation and then abtained by XRD
2018-06-19meta-author
PAM-XIAMEN can supply GaAs wafer with EPD less than 5000/cm2.
Q: Could you please advise guaranteed EPD for below substrate and epi?
Gallium Arsenide wafers, P/E 2″Ø×380±25µm,
LEC SI c doped GaAs:-[100]±0.5°, n-type Ro=(0.8E8-0.9E8)Ohmcm,
One-side-polished, back-side matte etched, 2 Flats,
LT-GaAs EPI: 1-2µm, Resistivity >1E7 Ohm-cm, [...]
2018-09-06meta-author
Q:What atomic ratio for Si/C in SiC ?
A:Atomic ratio for Si/C in SiC is 1:1
2018-06-19meta-author
Q:For 4” pss wafer, the light comes out from the p-GaN side not from sapphire, so I can’t do flip chip packaging. Also I don’t know whether laser liftoff is possible for pss wafer.
Is it possible you can share any image of the etched surface of [...]
2018-06-19meta-author
Q: For GaN on sapphire, could you please let us know which side is epi-ready?
A: Ga-face,epi-ready and N face is connecting to sapphire.
2018-06-19meta-author