PAM XIAMEN offers 2″ Diameter Wafer-2″ wafers (100).
2″ Diameter Wafer
2″ wafers (100)
2“ Undoped Ge (100)
Ge Wafer (100) Undoped, 2″ dia x 0.5 mm, 1SP, resistivities: >50 ohm-cm
Ge Wafer (100) Undoped, 2″ dia x 0.5 mm, resistivities: >50 ohm-cm, 2SP [...]
2019-04-23meta-author
PAM-XIAMEN offers (11-22) Plane Si-GaN Freestanding GaN Substrate
Item
PAM-FS-GAN(11-22)- SI
Dimension
5 x 10 mm2 or 5 x 20 mm2
Thickness
380+/-50um
Orientation
(11-22) plane off angle toward A-axis 0 ±0.5°
(11-22) plane off angle toward C-axis -1 ±0.2°
Conduction Type
Semi-Insulating
Resistivity (300K)
> 106 Ω·cm
TTV
≤ 10 µm
BOW
BOW ≤ 10 µm
Surface Roughness
Front side: Ra<0.2nm, epi-ready;
Back side: Fine Ground or polished.
Dislocation Density
≤5 x 10 6cm-2
Macro Defect Density
0 cm-2
Useable Area
> 90% (edge exclusion)
Package
each in single wafer container, under nitrogen atmosphere, packed in class 100 clean room
For more information, please contact us email at victorchan@powerwaywafer.com and powerwaymaterial@gmail.com
2020-08-20meta-author
The dependence of the morphology and crystallinity of an amorphous Ge (a-Ge) interlayer between two Si wafers on the annealing temperature is identified to understand the bubble evolution mechanism. The effect of a-Ge layer thickness on the bubble density and size at different annealing [...]
2019-12-02meta-author
CONGRESSIONAL RESEARCH ARM PRODUCES REPORT ON THE U.S. CHIP INDUSTRY
A newly released report by a non-partisan research arm of Congress underscores how semiconductors’ economic and military importance has made the industry’s health a focus of congressional interest for nearly 70 years. The report, produced by the [...]
2016-07-20meta-author
Low-temperature GaAs grown by molecular-beam epitaxy under high As overpressure: a reflection high-energy electron diffraction study
Reflection high-energy electron diffraction (RHEED) was used for in situ monitoring of the growth behavior of GaAs at various temperatures. The growth was performed on both singular and 2° [...]
Epitaxial lift-off process enables the separation of III–V device layers from gallium arsenidesubstrates and has been extensively explored to avoid the high cost of III–V devices by reusing the substrates. Conventional epitaxial lift-off processes require several post-processing steps to restore the substrate to an epi-ready [...]