PAM-XIAMEN Offers High Purity Semi-Insulating SiC substrate

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PAM-XIAMEN Offers High Purity Semi-Insulating SiC substrate

Xiamen Powerway Advanced Material Co.,Ltd., a leading supplier of High Purity Semi-Insulating SiC substrate and other related products and services announced the new availability of size 2”&3”&4”&6” is on mass production by PVT. This new product represents a natural addition to PAM-XIAMEN’s product line. Dr. Shaka, said, “We are pleased to offer High Purity Semi-Insulating SiC substrate to our customers. 4H Semi-Insulating Silicon Carbide (SiC) substrates are available in on-axis orientation. From epitaxy process in our research, we found micropipe density normally is not main obstacle to grow high quality epi layers, instead, carbon inclusions because a problem, hence, we focus on control or remove wafer without or smaller carbon inclusions, so for research grade and production grade HPSI SIC, it can ensure high quality heteroepitaxy such as AlGaN/GaN structure”. Because of High Purity without any dopants, the substrate material keep high resistivity with good uniformity.

1.Wafer List:

Item Number Diameter Type Orientation Thickness Resistivity(Ohm-cm) Grade
S4H-150-SI-PWAM-500-D 150mm HPSI On-axis 500µm +/-25µm ≥ 1E7 Dummy Grade
S4H-150-SI-PWAM-500-R 150mm HPSI On-axis 500µm +/-25µm ≥ 1E7 Research Grade
S4H-150-SI-PWAM-500-A 150mm HPSI On-axis 500µm +/-25µm ≥ 1E7 Production Grade
S4H-100-SI-PWAM-500-D 100mm HPSI On-axis 500µm +/-25µm ≥ 1E7 Dummy Grade
S4H-100-SI-PWAM-500-R 100mm HPSI On-axis 500µm +/-25µm ≥ 1E7 Research Grade
S4H-100-SI-PWAM-500-A 100mm HPSI On-axis 500µm +/-25µm ≥ 1E7 Production Grade
S4H-76-SI-PWAM-350-D 76.2mm HPSI On-axis 350µm +/-25µm ≥ 1E7 Dummy Grade
S4H-76-SI-PWAM-350-R 76.2mm HPSI On-axis 350µm +/-25µm ≥ 1E7 Research Grade
S4H-76-SI-PWAM-350-A 76.2mm HPSI On-axis 350µm +/-25µm ≥ 1E7 Production Grade
S4H-51-SI-PWAM-350-D 50.8mm HPSI On-axis 350µm +/-25µm ≥ 1E7 Dummy Grade
S4H-51-SI-PWAM-350-R 50.8mm HPSI On-axis 350µm +/-25µm ≥ 1E7 Research Grade
S4H-51-SI-PWAM-350-A 50.8mm HPSI On-axis 350µm +/-25µm ≥ 1E7 Production Grade

 

2. Specification of HPSI SiC Substrate

2-1 4H HPSI (HIGH PURITY SEMI-INSULATING) SIC WAFER SPECIFICATION,2”

SUBSTRATE PROPERTY S4H-51-SI-PWAM-350 
Description A/B Production Grade  C/D Research Grade  D Dummy Grade  4H SEMI Substrate
Polytype 4H
Diameter (50.8 ± 0.38) mm
Thickness  (350 ± 25) μm
Type High Purity Semi-Insulating(HPSI), undoped
Dopant Undoped
Resistivity (RT) >1E7 Ω·cm
Surface Roughness < 0.5 nm (Si-face CMP Epi-ready); <1 nm (C- face Optical polish)
FWHM A<30 arcsec                   B/C/D <50 arcsec
Micropipe Density A+≤1cm-2  A≤10cm-2   B≤30cm-2  C≤50cm-2  D≤100cm-2
Surface Orientation
On axis                         <0001>± 0.5°
Off axis                         3.5° toward <11-20>± 0.5°
Primary flat orientation Parallel {1-100} ± 5°
Primary flat length 16.00 ± 1.70 mm
Secondary flat orientation Si-face:90° cw. from orientation flat ± 5°
<span “=”” style=”font-size: 10pt;”>                       C-face:90° ccw. from orientation flat ± 5°
Secondary flat length 8.00 ± 1.70 mm
Surface Finish Single or double face polished
Packaging Single wafer box or multi wafer box
Usable area ≥ 90 %
Edge exclusion 1 mm

2-2 4H HPSI (HIGH PURITY SEMI-INSULATING) SIC WAFER SPECIFICATION,3”

SUBSTRATE PROPERTY S4H-76-N-PWAM-350         
Description A/B Production Grade  C/D Research Grade  D Dummy Grade   4H SiC Substrate
Polytype 4H
Diameter (76.2 ± 0.38) mm
Thickness      (350 ± 25) μm                       
Type High Purity Semi-Insulating(HPSI)
Dopant Undoped
Resistivity (RT) >1E7Ω·cm
Surface Roughness < 0.5 nm (Si-face CMP Epi-ready); <1 nm (C- face Optical polish)
FWHM A<30 arcsec                   B/C/D <50 arcsec
Micropipe Density A+≤1cm-2  A≤10cm-2   B≤30cm-2  C≤50cm-2  D≤100cm-2
TTV/Bow /Warp ＜25μm
Surface Orientation <0001>± 0.5°
Primary flat orientation <11-20>±5.0°
Primary flat length 22.22 mm±3.17mm
0.875″±0.125″
Secondary flat orientation Si-face:90° cw. from orientation flat ± 5°
Primary flat length C-face:90° ccw. from orientation flat ± 5°
Secondary flat length 11.00 ± 1.70 mm
Surface Finish Single or double face polished
Packaging Single wafer box or multi wafer box
Scratch None
Usable area ≥ 90 %
Edge exclusion 2mm

2-3 4H HPSI (HIGH PURITY SEMI-INSULATING) SIC WAFER SPECIFICATION,4”

SUBSTRATE PROPERTY S4H-100-SI-PWAM-500
Description A/B Production Grade  C/D Research Grade  D Dummy Grade   4H SiC Substrate
Polytype 4H
Diameter (100 ± 0.5) mm
Thickness (500 ± 25) μm
Type High Purity Semi-Insulating(HPSI)
Dopant Undoped
Resistivity (RT) >1E7 Ω·cm
Surface Roughness < 0.5 nm (Si-face CMP Epi-ready); <1 nm (C- face Optical polish)
FWHM A<30 arcsec                   B/C/D <50 arcsec
Micropipe Density A≤5cm-2   B≤15cm-2  C≤50cm-2  D≤100cm-2
TTV/Bow /Warp TTV＜10μm;TTV＜ 25μm;WARP＜45μm
Surface Orientation <0001>± 0.5°
Primary flat orientation <11-20>±5.0°
Primary flat length 32.50 mm±2.00mm
Secondary flat orientation Si-face:90° cw. from orientation flat ± 5°
C-face:90° ccw. from orientation flat ± 5°
Secondary flat length 18.00 ± 2.00 mm
Surface Finish Double face polished
Packaging Single wafer box or multi wafer box
Scratches –
Cracks None
Usable area ≥ 90 %
Edge exclusion 2mm

2-4 4H HPSI (HIGH PURITY SEMI-INSULATING) SIC WAFER SPECIFICATION,6”

SUBSTRATE PROPERTY S4H-150-SI-PWAM-500
Description A/B Production Grade  C/D Research Grade  D Dummy Grade   4H SiC Substrate
Polytype 4H
Diameter (150 ± 0.5) mm
Thickness (500 ± 25) μm
Type High Purity Semi-Insulating(HPSI)
Dopant Undoped
Resistivity (RT) >1E7 Ω·cm
Surface Roughness < 0.5 nm (Si-face CMP Epi-ready); <1 nm (C- face Optical polish)
FWHM A<30 arcsec                   B/C/D <50 arcsec
Micropipe Density A≤5cm-2   B≤15cm-2  C≤50cm-2  D≤100cm-2
TTV/Bow /Warp TTV＜10μm;BOW＜ 40μm;WARP＜60μm
Surface Orientation <0001>± 0.5°
Primary flat orientation <11-20>±5.0°
Primary flat length 47.50 mm±2.00mm
Secondary flat length N/A
Surface Finish Double face polished
Packaging Single wafer box or multi wafer box
Scratches –
Cracks None
Usable area ≥ 90 %
Edge exclusion 2mm

3. Fluorescence PL diagram of Vsi

See below Fluorescence PL diagram of Vsi, tested by a 2inch,4H, semi-insulating SiC.

Fluorescence PL diagram of Vsi

Fluorescence PL diagram of Vsi

 

 

 

 

 

 

 

 

For all information about SiC wafer, please visit our website: https://www.powerwaywafer.com/sic-wafer/sic-wafer-substrate.htm

send us email at victorchan@powerwaywafer.com

2018-05-04

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