PAM XIAMEN offers 6″ FZ Silicon Wafer
Silicon wafers, per SEMI Prime, P/E 6″Ø×875±25µm,
FZ p-type Si:B[111]±0.5°, Ro > 10,000 Ohmcm,
Warp<60μm,
One-side-polished, Particles: ≤10@≥0.3μm,
MCL (Na, Al, K, Fe, Ni, Cu, Zn)<5E10/cm²,back-side etched,
Tarnish, orange peel, contamination, haze,
micro scratch, chips, edge chips, crack,
crow feet, pin hole, pits, dent, waviness,
smudge&scar on [...]
2019-09-03meta-author
Semi-insulating indium phosphide (formula: InP) wafer at prime grade for sale is dark gray crystal with a bandwidth (Eg=1.35 eV) at room temperature, a dissociation pressure of 2.75MPa at a melting point, an electron mobility of 4600cm2/(V·s), and a hole mobility of 150cm2/(V·s). PAM-XIAMEN [...]
2021-08-06meta-author
We can provide 2″ UV LED wafer and AlN wafer for medical & scientific applications including photodynamic therapy also benefit from a high power and high flux density LED.
1. Features & Dimensions of UV LED Wafer
Growth Technique – MOCVD
Substrate Material:Sapphire Substrate (Al2O3)
Substrate Conduction: Insulating
Substrate [...]
PAM XIAMEN offers 4″ Silicon Wafer.
Material
Orient.
Diam.
Thck
(μm)
Surf.
Resistivity
Ωcm
Comment
n-type Si:As
[111-4°] ±0.5°
4″
325
P/E
0.001-0.005
SEMI Prime, Back Surface: Sand blasted with LTO seal
n-type Si:As
[111-4°] ±0.5°
4″
300
P/E
0.001-0.005
SEMI Prime, Back-side Sand-blasted with LTO seal, in Empak cassettes of 7 wafers
n-type Si:As
[111-2°] ±0.5°
4″
400
P/EOx
0.001-0.004 {0.0018-0.0036}
SEMI Prime, Epi edges, 0.5μm LTO
n-type Si:As
[111-4°] ±0.5°
4″
525
P/E
0.001-0.005
SEMI Prime
n-type Si:As
[111-4°]
4″
525
P/E
0.001-0.005
SEMI Prime
n-type Si:As
[111] ±0.5°
4″
1000
P/E
0.001-0.005 {0.0031-0.0040}
SEMI Prime, TTV<4μm, [...]
2019-03-05meta-author
PAM XIAMEN offers 4″ Silicon EPI Wafers.
Substrate
EPI
Comment
Size
Type
Res
Ωcm
Surf.
Thick
μm
Type
Res
Ωcm
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
20
n- Si:P
7±10%
N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
10
n- Si:P
2±0.4
N/N/N+
4″Øx380μm
n- Si:As[111]
0.001-0.005
P/EOx
21
n- Si:P
150 ±10%
N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
22.5
n- Si:P
12±10%
N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
28.5
n- Si:P
2±10%
N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
26
n- Si:P
18±10%
N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
11
n- Si:P
2±10%
N/N/N+
4″Øx525μm
n- Si:As[111]
0.001-0.005
P/E
27
n- Si:P
220 ±10%
N/N+
4″Øx525μm
n- Si:As[111]
0.001-0.005
P/E
27.5
n- Si:P
>250
N/N+
4″Øx525μm
n- Si:As[111]
0.001-0.005
P/E
28
n- Si:P
165 ±10%
N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
28
n- Si:P
43688
N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
9-11
n- Si:P
43468
N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
28
n- Si:P
11±10%
N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
8-12
n- Si:P
43468
N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
30
n- Si:P
11±10%
N/N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
15
n- Si:P
4±10%
N/N/N/N+
4″Øx525μm
n- Si:As[111]
0.0010-0.0035
P/E
5
n- Si:P
1.5±10%
N/N/N/N+
4″Øx525μm
n- [...]
2019-03-08meta-author
A novel method for estimating threshold voltage shifts of n-channel SiC MOSFETs under negative gate bias stresses has been proposed. In the proposed method, n-type SiC MOS capacitors were utilized instead of n-channel SiC MOSFETs. The n-type SiC MOS capacitors were exposed to ultraviolet [...]
2019-10-21meta-author