Thanks to GaAs tunnel junction technology, we offer epi wafers of single-junction and dual-junction InGaP / GaAs solar cells, with different structures of epitaxial layers (AlGaAs, InGaP) grown on GaAs for solar cell application. And now we offer GaAs epi wafer with InGaP tunnel junction as [...]
Below is the regular standard specification of Polycrystalline back sealed polished wafer, please kindly note in this size, normally notch is used, rather than flat.
Si Wafer with back seal poly+SiO2
1. Polycrystalline Back Sealed Silicon Wafer Specification
Parameter
Unit
PAM210305-SI
Grade
—
Polycrystalline back sealed polished wafer
General Characteristics
—
—
Growth Method
—
CZ
Diameter
mm
200±0.2
Type
—
N
Crystal Orientation
—
<100>±0.5
Dopant
—
AS
Electrical Characteristics
—
—
Resistivity
Ω•cm
0.002-0.004
RRG [...]
2021-03-25meta-author
The process of silicon carbide oxidation is simple. The silicon carbide substrate can be directly thermally oxidized to obtain SiO2 on the substrate. Silicon carbide is the only compound semiconductor that can obtain high-quality SiO2 through silicon carbide thermal oxidation. The theoretical formula is as follows:
SiC+1.5O2→SiO2+CO
That is, to grow 100nm [...]
2021-04-26meta-author
Light–Output Enhancement of Nano-Roughened GaN Laser Lift-Off Light-Emitting Diodes Formed by ICP Dry Etching
In this paper, we report the fabrication and characteristics of nano-roughened GaN laser lift-off (LLO) light-emitting diodes (LEDs) with different scale surface roughness. The surface roughness of devices was controlled by [...]
2013-03-29meta-author
Helium implantation-induced layer splitting of InP in combination with direct wafer bonding was utilized to achieve low temperature layer transfer of InP onto Si(1 0 0) substrates. InP(1 0 0) wafers with 4 inch diameter were implanted by 100 keV helium ions with a dose of 5 × 1016 cm−2. Then [...]
2019-12-09meta-author
PAM XIAMEN offers Si-Ge alloy crystal.
Si-Ge or silicon-germanium alloy wafer is commonly used as semiconductor material in integrated circuits (ICs) for heterojunction bipolar transistors or as a strain-inducing layer for CMOS transistors. Si-Ge alloys wafer are of interest because they have higher mobility [...]
2019-05-16meta-author