5-5 SiC Device Fundamentals
To minimize the development and production costs of SiC electronics, it is important that SiC device fabrication takes advantage of existing silicon and GaAs wafer processing infrastructure as much as possible. As will be discussed in this section, most of the steps necessary to fabricate SiC electronics starting from SiC wafers can be accomplished using somewhat modified commercial silicon electronics processes and fabrication tools.
3-1. Large Point Defects Defects which exhibit a clear shape to the unassisted eye and are > 50 microns across. These features include spikes, adherent particles, chips and craters. Large point defects less than 3 mm apart count as one defect.
5-4-3 Growth of Hexagonal Polytype SiC Wafers In the late 1970s, Tairov and Tzvetkov established the basic principles of a modified seeded sublimation growth process for growth of 6H-SiC. This process, also referred to as the modified Lely process,was a breakthrough for SiC in that [...]
2-7.Primary Flat Orientation The at of the longest length on the wafer, oriented such that the chord is parallel with a specied low index crystal plane. Measured on one wafer per ingot using Laue back-reection technique with manual angle measurement.
2-30.Dopant A dopant, also called a doping agent, is a trace impurity element that is inserted into a substance (in very low concentrations) in order to alter the electrical properties or the opticalproperties of the substance. In the case of crystalline substances, the atoms of [...]
2-6.Wafer Primary Flat The flat of longest length on the wafer, oriented such that the chord is parallel with a specified low index crystal plane; major flat. The primary at is the {10-10} plane with the at face parallel to the <11-20> direction.
5-4-4-2 SiC Epitaxial Growth Polytype Control Homoepitaxial growth, whereby the polytype of the SiC epilayer matches the polytype of the SiC substrate, is accomplished by “step-controlled” epitaxy . Step-controlled epitaxy is based upon growing epilayers on an SiC wafer polished at an angle (called the [...]
