5-5 SiC Device Fundamentals
To minimize the development and production costs of SiC electronics, it is important that SiC device fabrication takes advantage of existing silicon and GaAs wafer processing infrastructure as much as possible. As will be discussed in this section, most of the steps necessary to fabricate SiC electronics starting from SiC wafers can be accomplished using somewhat modified commercial silicon electronics processes and fabrication tools.
3-12. Silicon Droplets Silicon droplets can appear as either small mounds or depressions in the wafer surface. Normally absent, but if present are largely concentrated at perimeter of wafer. If present, estimate the % of speci ed area affected.
5-6-4-2 SiC High-Power Switching Transistors Three terminal power switches that use small drive signals to control large voltages and currents (i.e., power transistors) are also critical building blocks of high-power conversion circuits. However, as of this writing, SiC high-power switching transistors are not yet commercially [...]
5-6 SiC Electronic Devices and Circuits This section briefly summarizes a variety of SiC electronic device designs broken down by major application areas. SiC process and material technology issues limiting the capabilities of various SiC device topologies are highlighted as key issues to be addressed [...]
5-6-4-1-1 SiC Schottky Power Rectifiers. 4H-SiC power Schottky diodes (with rated blocking voltages up to 1200 V and rated on-state currents up to 20 A as of this writing) are now commercially available . The basic structure of these unipolar diodes is a patterned metal [...]
2-28.WARP Warp is the difference between the maximum and the minimum distances of the median surface of a free, un-clamped wafer from the reference plane defined above. This definition follows ASTM F657, and ASTM F1390,which deviation from a plane of a slice or wafer centerline [...]
2-14.Masking Defects also referred to as “Mound” When one defect prevents the detection of another defect, the undetected defect is called the masked defect. A distinct raised area above the wafer frontside surface as viewed with diffuse illumination.
